KS57C2308/P2308/C2316/P2316
DI
— Disable Interrupts
DI
Operation:
Operand
Description:
Bit 3 of the interrupt priority register IPR, IME, is cleared to logic zero, disabling all interrupts.
Interrupts can still set their respective interrupt status latches, but the CPU will not directly
service them.
Operand
Example:
If the IME bit (bit 3 of the IPR) is logic one (e.g., all instructions are enabled), the instruction
DI
sets the IME bit to logic zero, disabling all interrupts.
–
Disable all interrupts
–
1
1
1
1
0
1
Operation Summary
Binary Code
1
1
1
1
1
0
0
1
SAM47 INSTRUCTION SET
Bytes
2
Operation Notation
0
IME
0
0
Cycles
2
5-51