Samsung KS57C2308 Manual page 190

Single-chip cmos microcontroller
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INTERRUPTS
Multi-Level Interrupt Handling
With multi-level interrupt handling, a lower-priority interrupt request can be executed by manipulating the
interrupt status flags, IS0 and IS1 while a high-priority interrupt is being serviced (see Table 7-2).
When an interrupt is requested during normal program execution, interrupt status flags IS0 and IS1 are set to "1"
and "0", respectively. This setting allows only highest-priority interrupts to be serviced. When a high-priority
request is accepted, both interrupt status flags are then cleared to "0" by software so that a request of any priority
level can be serviced. In this way, the high- and low-priority requests can be serviced in parallel (see Figure 7-4).
Table 7-2. IS1 and IS0 Bit Manipulation for Multi-Level Interrupt Handling
Process Status
0
1
2
Normal Program
Processing
(Status 0)
INT Disable
SET IPR
INT Enable
Low or High
Level
Interrupt
Generated
7-6
Before INT
IS1
IS0
0
0
All interrupt requests are serviced.
0
1
Only high-priority interrupts as determined by the
current settings in the IPR register are serviced.
1
0
No additional interrupt requests will be serviced.
1
1
Value undefined
INT Disable
Modify Status
INT Enable
Low or High
Level Interrupt
Generated
Figure 7-4. Multi-Level Interrupt Handling
Effect of Isx Bit Setting
Single
Interrupt
Status 1
Status 0
High-Level
Interrupt
Generated
Status 0
KS57C2308/P2308/C2316/P2316
After INT ACK
IS1
0
1
2-Level
Interrupt
3-Level
Interrupt
Status 1
Status 2
IS0
1
0

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