Mitsubishi A1SJH(S8) User Manual page 17

Hide thumbs Also See for A1SJH(S8):
Table of Contents

Advertisement

USER PRECAUTIONS
Precautions when using the AnS series
For a new CPU module, which has never used before, the contents of built-in RAM and
device data are undefined.
Make sure to clear the built-in RAM memory (PLC memory all clear) in the CPU module by
peripheral devices and operate latch clear by RUN/STOP key switches.
Precautions for battery
(1)
(2)
The operation after a battery is unmounted and the programmable controller is stored.
When reoperating after a battery is uncounted and the programmable controller is
stored, the contents of built-in RAM and device data may be undefined.
For this reason, make sure to clear the built-in RAM memory (PLC memory all clear) in
the CPU module by peripheral devices and operate latch clear by RUN/STOP key
switches before start the operation again.
After the built-in RAM clear and latch clear of the CPU module, write the backed-up
memory contents to the CPU module before saving.
The operation after excess of a battery life
If a battery exceeded its guaranteed life is stored and reoperated, the contents of built-in
RAM and device data may be undefined.
For this reason, make sure to clear the built-in RAM memory (PLC memory all clear) in
the CPU module by peripheral devices and operate latch clear by RUN/STOP key
switches before start the operation again.
After the built-in RAM clear and latch clear of the CPU module, write the backed-up
memory contents to the CPU module before saving.
POINT
Make sure to back up each memory contents before storing the programmable
controller.
*
Refer to the following manuals for details of built-in RAM clear (PLC memory all clear) by periph-
eral devices.
GX Developer Operating Manual
A6GPP/A6PHP Operating Manual
SW
IVD-GPPA Operating Manual
Refer to Section 4.5 for latch clear operation by RUN/STOP key switch of the CPU module.
*
*
A - 15

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

A1shA2shcpu (s1)

Table of Contents