Tx 8B/10B Encoder - Xilinx 7 Series User Manual

TX 8B/10B Encoder

Functional Description
Many protocols use 8B/10B encoding on outgoing data. 8B/10B is an industry standard encoding
scheme that trades two bits overhead per byte for achieved DC-balance and bounded disparity to
allow reasonable clock recovery. The GTP transceiver has a built-in 8B/10B TX path to encode TX
data without consuming FPGA resources. Enabling the 8B/10B encoder increases latency through
the TX path. The 8B/10B encoder can be disabled or bypassed to minimize latency, if not needed.
8B/10B Bit and Byte Ordering
The order of the bits after the 8B/10B encoder is the opposite of the order shown in
10B Valid
transceiver always transmits the right-most bit first. To match with 8B/10B, the 8B/10B encoder in
the GTP transceiver automatically reverses the bit order.
GTP transceiver when TX_DATA_WIDTH = 20 and 40. The number of bits used by TXDATA and
corresponding byte orders are determined by TX_DATA_WIDTH.
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When the 8B/10B encoder is bypassed and TX_DATA_WIDTH is set to a multiple of 10, 10-bit
characters are passed to TX data interface with this format:
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K Characters
The 8B/10B table includes special characters (K characters) that are often used for control functions.
TXCHARISK ports are used to indicate if data on TXDATA are K characters or regular data. The
8B/10B encoder checks received TXDATA byte to match any K character if corresponding
TXCHARISK bit is driven High.
7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016
Characters, because 8B/10B encoding requires bit a0 to be transmitted first, and the GTP
Only use TXDATA[15:0] if TX_DATA_WIDTH = 20
Use full TXDATA[31:0] if TX_DATA_WIDTH = 40
The corresponding TXCHARDISPMODE represents the 9th bit
The corresponding TXCHARDISPVAL represents the 8th bit
The corresponding TXDATA byte represents [7:0] bits
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TX 8B/10B Encoder
Appendix C, 8B/
Figure 3-6 shows data transmitted by the
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