HP 1650B Programming Reference Manual page 150

Logic analyzers
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= {I I2 13 I4 15)
Greater Than 60 ns
G T =
Less Than 60 ns
LT =
= string of up to 6 alphanumeric characters
name
polarity =
= format (integerfrom 0 to 65535) for a pod (pods are assigned in decreasing order)
pod-specification
L 1 A4 1 N}
clock-id = {J 1 K 1
= (OFF I ZUSing I FALLing I BOTH I LOW 1 HIGH}
clock-spec
= voltage (real number) -9.9 to + 9.9
value
Figure
11-2
1 l-l. SFORmat Subsystem Syntax Diagram (continued)
HP 1650B/HP 16518
Programming Reference

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