5.0 Ata Drive Register Set Definition And Protocol - SanDisk CompactFlash Product Manual

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CompactFlash Memory Card Product Manual

5.0 ATA Drive Register Set Definition and Protocol

The
CompactFlash
configured as a high performance I/O device
through:
a.) Standard PC-AT disk I/O address spaces
1F0h-1F7h, 3F6h-3F7h (primary); 170h-
177h, 376h-377h (secondary) with IRQ 14
(or other available IRQ).
b.) Any system decoded 16 byte I/O block
using any available IRQ.
c.) Memory space.
Table 5-1 I/O Configurations
Config
IO or
Index
Memory
0
Memory
1
2
2
3
3
46
Memory
Card
can
Standard Configurations
Address
0-F, 400-7FF
I/O
XX0-XXF
I/O
1F0-1F7, 3F6-3F7
I/O
1F0-1F7, 3F6-3F7
I/O
170-177, 376-377
I/O
170-177, 376-377
SanDisk CompactFlash Memory Card Product Manual © 1998 SANDISK CORPORATION
be
The communication to or from the CompactFlash
Memory Card is done using the Task File registers
which provide all the necessary registers for
control and status information. The PCMCIA
interface connects peripherals to the host using
four register mapping methods. The following is a
detailed description of these methods:
Drive #
0
Memory Mapped
0
I/O Mapped 16 Contiguous Registers
0
Primary I/O Mapped Drive 0
1
Primary I/O Mapped Drive 1
0
Secondary I/O Mapped Drive 0
1
Secondary I/O Mapped Drive 1
Description

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