Pl4407 Decoder; Power Management (Symbol Ms4404 Only) - Motorola Symbol MS4404 Integration Manual

PL4407 Decoder

ARM9-Based Processor
The digital system is built on an ARM9 Harvard architecture core, 32 bit RISC engine with a five-stage pipeline. The
major features of the core are:
•
Programmable speed up to 150 MHz with an adjustable external bus speed up to 96 MHz.
•
16K instruction and data cache (64-way set associative).
•
Flexible internal bus architecture that supports DMA operations from any peripheral module to the core or to
another peripheral port including main memory.
• Implementation of an enhanced Memory Management Unit (MMU).
Main Memory
The two available PL4407 microprocessor designs are:
•
PL4407-x100: 32-bit external bus interface to 8 MB of PC100-compliant SDRAM, classified as Mobile
SDRAM due to its lower operating current and enhanced power-down modes; internally configured as
4 banks of 512 kb x 32 bits.
•
PL4407-x200: 32-bit external bus interface to 16 MB of Mobile SDRAM; internally configured as
4 banks of 1024 Kb x 32 bits.

Power Management (Symbol MS4404 Only)

NOTE This section does not apply to the USB interface. USB supports low power mode as defined by the USB
specification.
The Symbol MS4404 has two power modes:
•
Continuous Power
• Low Power.
In Continuous Power mode, the Symbol MS4404 system is always running even when not in a decode session.
In Low Power mode (the default power mode), the Symbol MS4404 draw less current than when in Continuous
Power mode, and is more suitable for battery-powered applications. In this mode the Symbol MS4404 enter Low
Power mode whenever possible. The Symbol MS4404 must be awakened from Low Power mode before performing
any functions.
Getting Started 1 - 5