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System Configuration Setup
Chipset Features Setup
AMIBIOS SETUP - CHIPSET FEATURE CMOS SETUP
(C)1999 American Megatrends, Inc. All Rights Reserved
*** DRAM Timing ***
Top Performance
SDRAM Timing by SPD
SDRAM CAS# Latency
CPU/DRAM Frequency
C2P Concurrency & Master:Enabled
DRAM Integrity Mode
AGP Mode
AGP Comp.Driving
Manual AGP Comp.Driving :CB
AGP Aperture Size
USB Controller
USB Legacy Support
Sample Chipset screen
CAUTION: The settings shown are the recommended values. Do not use other
values unless you have specific technical knowledge and experience with chipset
configuration.
❖
Top Performance - Determines memory access speed.
Enabled
Disabled
(default)
❖
SDRAM Timing by SPD - Determines if SPD (Serial Presence Detect) controls
SDRAM timing.
Enabled
(default)
Disabled
❖
SDRAM CAS Latency Time
3
2
Auto (default)
❖
CPU/DRAM Frequency
Auto (default)
:Disabled
:Enabled
:Auto
:Auto
:Ecc
:4X
:Auto
:64MB
:USB Port0&1
:Disabled
ESC : Quit
F1 : Help
F5 : Old Values (Shift)F2 : Color
F6 : Load BIOS Defaults
F7 : Load Setup Defaults
Sets the access speed to maximum.
Disables this option.
SPD used to control SDRAM timing.
SPD not used to control SDRAM timing.
For 67/83 MHz SDRAM DIMM module
For 100 MHz SDRAM DIMM module
CAS latency time will be set automatically if
you have SPD on SDRAM
CPU/DRAM speed is automatically set.
↑↓←→: Select Item
PU/PD/+/- : Modify
77
Setup
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