VIA Technologies EPIA-M920 User Manual page 10

Figure 32: CMOS battery slot diagram....................................................................... 43
Figure 33: USB 3.0 connector diagram ....................................................................... 44
Figure 34: Jumper settings example............................................................................ 45
Figure 35: CLEAR CMOS jumper diagram ................................................................. 47
Figure 36: SATA DOM voltage select jumper diagram.......................................... 48
Figure 37: COM1 and COM2 voltage select jumper diagram .............................. 49
Figure 38: COM3 and COM4 voltage select jumper diagram .............................. 50
Figure 39: VDD power select jumper diagram......................................................... 51
Figure 40: LVDS jumper diagrams................................................................................ 52
Figure 41: DDR3 memory slot diagrams .................................................................... 53
Figure 42: Inserting the memory module................................................................... 54
Figure 43: Locking the memory module .................................................................... 54
Figure 44: Disengaging the SODIMM locking clips ................................................. 55
Figure 45: Removing the memory module ................................................................ 55
Figure 46: PCI Express slot diagram............................................................................ 56
Figure 47: Suggested minimum chassis dimensions ................................................ 57
Figure 48: Suggested minimum internal chassis ceiling height (for fanless
model) ............................................................................................................................... 58
Figure 49: Suggested minimum internal chassis ceiling height (for fan model)59
Figure 50: Suggested keepout areas ........................................................................... 60
Figure 51: Illustration of the Main menu screen....................................................... 63
Figure 52: Illustration of the Advanced Settings screen......................................... 65
Figure 53: Illustration of the ACPI Settings screen .................................................. 66
Figure 54: Illustration of S5 RTC Wake Settings screen.......................................... 67
Figure 55: Illustration of CPU Information screen.................................................... 68
Figure 56: Illustration of SATA Configuration screen ............................................. 69
Figure 57: Illustration of F71869 Super IO Configuration screen......................... 70
Figure 58: Illustration of F71869 H/W Monitor screen ........................................... 71
Figure 59: Illustration of Clock Generator Configuration screen ......................... 72
Figure 60: Illustration of On Board Configuration screen ...................................... 73
Figure 61: Illustration of Chipset Settings screen..................................................... 75
Figure 62: Illustration of DRAM Configuration screen ............................................ 76
Figure 63: Illustration of Video Configuration screen ............................................. 79
EPIA- - - - M920 EPIA M920 User Manual User Manual
EPIA EPIA M920 M920 User Manual User Manual
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