Dn-Board (2 Of 2) Block Diagram - Panasonic TH-103PF10UK Service Manual

9.13. DN-Board (2 of 2) Block Diagram

I-CHIPS PORT1 OUT
(60bit)
PI1D(0)-(59)
PI1D(0)-(59)
PI1_HS,_VS,_CLK
PORT1_HS,_VS,_CLK PI1_FLD,_ACT
PORT1_FLD,_ACT
I-CHIPS PORT2 OUT
(60bit)
PI2D(0)-(59)
PI2D(0)-(59)
PI2_HS,_VS,_CLK
PORT2_HS,_VS,_CLK PI2_FLD,_ACT
PORT2_FLD,_ACT
IC5101
FPGA1
CLKM_20MHz
CLKM/CLK6
30bit 2_RGB VIDEO
SIGNAL PROCESSOR
NRST -FP
NRESET
60bit 2_I-CHIPS OUT
CONFIGURATION
1
2
3
4
IC5103
+3.3V
CLOCK BUFFER
IIC_BUS
CBCLK_A LCLK2 8
1 XIN
P3V_SDA2
SDAT 4
X2CBCLK_A
7 LCLK1 P3V_SCL2
SCLK 10
IC5102
+3.3V
CLOCK BUFFER
LCLK2 8 IIC_BUS
CBCLK_B
1 XIN
P3V_SDA3
SDAT 4
X2CBCLK_B
7 LCLK1 P3V_SCL3
SCLK 10
IC4604
+3.3V CPG
VDD 74M_SS
CLK7
4
(74.25MHz)
CLKM_20MHz_F2
CLK1 CLKM_20MHz
1 XT 7
(2088MHz)
X4002
20 XTN
74M_NON_SS
CLK3
9
(74.25MHz)
OSD_72MHz
CLK5
13
(72MHz)
TH-103PF10UK/EK
DN-Board (2 of 2) Block Diagram
+1.2V +2.5V +3.3V
IC5303
VCCK VCC VCC
DDR_SDRAM1
DDR_SD-RAM
INTERFACE
RGB IN PORT1
SD-RAM1 DATA DQ1-DQ31
(60bit)
A0-A11
PI1D(0)-(59)
WE,CAS,RAS
PI1HSB,PI1VSB,
ADDRESS
PI1CLK
PI1FLD,PI1ACTB
A0-A11
WE,CAS,RAS
RGB IN PORT2 SD RAM2 DATA DQ1-DQ31
(60bit)
PI2D(0)-(59)
PO_RE0-9,PO_GE0-9,PO_BE0-9
FPGA2 OUT
PO_RO0-9,PO_GO0-9,PO_BO0-9
(60bit)
PI2HSB,PI2VSB,
POD_0-POD_59
PI2CLK
PO_HS,_VS
PI2FLD,PI2ACTB
PO_FLD,_ACT
POHSB,POVSB
POFLD,POACTB
MCDATA-0
IC5301 SO
ICHIPS-SI
SI
CPU I/F
MCCLK
I-CHIPS
SCLKB
ICHIPS-RST
IP CONVERSION
RSTB
ICHIPS-SS
SS
CLK IN
MCLK
CLK/SERIAL SELECT
4
5
FPGA_CONF_OE
1
2
OSD IN
OSD_HDO
OSD_VDO
OSD_YS
OSD_YM
OSD_CLK
OSD-HD
OSD_DATA0-15
+3.3V
VDD
SDRAM_I/F
IC5601 DQ0-DQ31
DQ0-DQ31
DQM0-DQM3
SDRAM1
A0-A11
CLK
+3.3V
VDD
CLK PLL11_OUT
IC5602
A0-A11 ADDR0-ADDR11
SDRAM2
DQ0-DQ31
DQ0-DQ31
DQM0-DQM3
IC4309
STB+5V STB 3.3V
STB+3.3V
+2.5V
2 VDD VOUT 4
VCC
P+15V
IC4306
VCC
STB 1.5V
STB+1.5V
IC5304
5 VIN VOUT 4
DDR_SDRAM2
S1 G1
D1 D1
Q4018
+2.5V
P+15V
Q4021
Q4020
IC4601
2OE
2A 2Y
6
1OE
1A 1Y
3
[ODD] [EVEN]
I-CHIPS RGB IN
CONFIGURATION
IC5603
FPGA2
VIDEO SIGNAL PROCESSOR
OSD
10bit LVDS
79
IC4305 IC4901
DC-DC CONVERTER DC-DC CONVERTER
P+15V
15V->2.5V 15V->3.3V/1.2V
17 VCC 23 VCC
26 18
20 OUT1 OUT1-1 OUT2-1
15 24 OUT1-2 OUT2-2 20
OUT2
S1 G1 S2 G2
S2 G2
25 19
19 LX LX1 LX2
D1 D1 D2 D2
D2 D2
7 -INC1 -INC2 8
12 -INC CTL 8
Q4017
23 VO 3 VO1 VO2 12
+3.3V
4 FB1 FB2 11
24 FB
16 CTL
DN DIGITAL SIGNAL PROCESSOR/MICOM
!
<TZTNP020XAT>
(Exchange board only)
IIC_BUS
+1.2V +2.5V +3.3V
TX_OUT0-
TX_OUT0+
TX_OUT1-
TX_OUT1+
LVDS OUT[ODD]
TX_OUT2-
ROUT TX_OUT2+
10bit LVDS
GOUT
TX_OUT3-
BOUT
TX_OUT3+
VSYNC
TX_OUT4-
HSYNC
CLK_O
TX_OUT4+
TX_CLK1-
TX_CLK1+
TX_CLK2-
TX_CLK2+
TX_OUT5-
LVDS OUT[EVEN]
TX_OUT5+
ROUT
TX_OUT6-
GOUT
TX_OUT6+
BOUT
10bit LVDS
TX_OUT7-
VSYNC
TX_OUT7+
HSYNC
CLK_O
TX_OUT8-
TX_OUT8+
TX_OUT9-
TX_OUT9+
TH-103PF10UK/EK
DN-Board (2 of 2) Block Diagram
TH-103PF10UK/EK
S1 G1 S2 G2
Q4019
D1 D1 D2 D2
+1.2V
DN5 TO D5
31 O-LVDS4
30 O+LVDS4
O-LVDS3
29
28 O+LVDS3
26 O-LVDS2
[ODD]
O+LVDS2
25
24 O-LVDS1
23 O+LVDS1
O-LVDS0
21
20 O+LVDS0
18 O+LVDSCLK
O-LVDSCLK
17
16 LVDS_DE
15 E-LVDSCLK
14 E+LVDSCLK
12 E-LVDS4
11 E+LVDS4
10 E-LVDS3
[EVEN]
9 E+LVDS3
7 E-LVDS2
6 E+LVDS2
5 E-LVDS1
4 E+LVDS1
2 E-LVDS0
1
E+LVDS0