Aiwa XD-DV290K Service Manual page 53

Pin No. Pin Name
198 A-DACK
199 VSS
200
201 HOST&SEL
202-204 HADDR0-2
205 DTACKSEL
206 /CS
207 R/W
208 /RD
I/O
I Audio data acknowledge.
— Ground for core logic and I/O signals.
I Pull up.
I Host address bus. 3-bit address bus selects one of eight host interface registers.
Tie HIGH to select WAIT signal, LOW to select DTACK signal (Motorola 68K
I
mode).
Host chip select. Host asserts CS to select the decoder for a read or write operation.
I
The falling edge of this signal triggers the read or write operation.
Read/write strobe in M mode. write strobe in I mode. Host asserts R/W LOW to select
I
write and
I Read strobe in I mode. Must be held HIGH in M Mode LOW to select Read.
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Description