Atari 400 Technical Reference Manual page 97

RAM STACK CONTENT
INTERRUPT VECTOR
DESCRIPTION
OS RETURN CONTROL
VDSLST [0200] Display list return, P
VVBLKI [0222]
*
VB LANK immediate
return, P, A,
X, V
CDTMA1 [0226] System Timer 1
return, P, A,
X, V,
CDTMA2 [0228] System Timer 2
return, P, A,
X, V,
VVBLKD [0224]
*
VB LANK defer.
return, p, A,
X, V
VIMIRQ [0216]
*
IRQ immediate
return, p,
A
VSEROR [020C]
*
Serial out ready return,
p,
A
VSERIN [020A]
*
Serial in ready
return, p,
A
VSEROC [020E]
*
Serial out compare return,
p,
A
VTIMR1 [0210] POKEY timer 1
return, p,
A
VTIMR2 [0212]
POKEY timer 2
return, p,
A
VTIMR4 [0214] POKEY timer 4
return, p,
A
VKEYBD [0208]
*
Keyboard data
return, p,
A
VPRSED [0202] Serial proceed
return, P,
A
VINTER [0204]
Serial interrupt
return, P,
A
VBREAK [0206] BRK instruction
return, p,
A
Figure 6-4 Interrupt and Timer Vector RAM Stack Content Table
*
The OS initializes these entries at power-up. Improperly
changing these vectors will alter system performance.
Miscellaneous Considerations
The following paragraphs list a set of miscellaneous
considerations for the writer of an interrupt service routine.
Restrictions on Clearing of "I" Bit
Display list, immediate vertical-blank and System Timer #1
routines should not clear the 6502 I bit. If the NMI leading to
one of these routines occurred while an IRQ was being processed,
then clearing the I bit will cause the IRQ to re-interrupt with
an unknown result.
return
return
The
as
VBLANK processor carefully checks this condition after the
stage 1 process and before the stage 2 process.
Interrupt Process Time Restrictions
You should not write an interrupt routine that exceeds 400 msec.
when added to the stage 1 VBLANK, if the serial 1/0 is being
used. The SID sets the CRITIC flag while serial bus
110
is in
progress.
OPERATING SYSTEM C016555 -- Section 6
112