Atari 400 Technical Reference Manual page 241

P1S VSERIN [020A,2] -- Serial 1/0 bus receive data
ready
This vector is initialized to point to the SIO utility's interrupt
service routine. See Section
o.
P19 VSEROR [020C,2] -- Serial 110 bus transmit ready
This vector is initialized to point to the SIO utility's interrupt
service routine. See Section
o.
P20 VSEROC [020E,2] -- Serial 1/0 bus transmit complete
This vector is initialized to point to the SIO utility's interrupt
service routine. See Section
o.
P21 VTIMR1 [0210,2], VTIMR2 [0212,2] and VTIMR4 (0214,2] -- PO~EY
timer vectors
The POKEY timer interrupts are not used by the
as
See Section 6.
Hardware Register Updates
As part of the stage 2 VB LANK process, certain hardware registers
are updated from
as
data base variables as explained in Section 6.
P22 SDMCTL* [022F, 1] -- DMA control
SDMCTL is set to a value of $02 at the beginning of a Display
Handler OPEN command, and then later set to a value of $22. The
value of SDMCTL is stored to DMACTL [D400] as part of the stage 2
VBLANK process.
P23 SDLSTL* [0230,1] and SDLSTH* (0231,1] -- Display list address
The Display Handler formats a new display list with every OPEN
command and puts the display list address in SDLSTL and SDLSTH. The
value of these bytes are stored to DLISTL [D402] and DLISTH [D403]
as part of the stage
2 VB LANK process.
256
0360-036F
0370-037F
03S0-038F
0390-039F
03AO-03AF
03BO-03BF
IOCB #2
IOCB #3
IOCB #4
IOCB #5
IOCB #6
IOCB #7
OPERATING SYSTEM C016555 -- Appendix L