Atari 400 Technical Reference Manual page 238

users to alwavs contain the current content of IRGEN.
Svstem Timers
The Svstem Timers are discussed in detail in Section 6.
Realtime Clock
The realtime clock (or frame counter, as it is sometimes called)
is incremented as part of the stage 1 V8LANK process as explained
in Section 6.
P3 RTCLOK [0012,3] -- Realtime frame counter
RTCLOK+O is the most significant byte, RTCLOK+l the next most
significant byte, and RTCLOK+2 the least significant byte. See the
discussions at D3 and preceding 810 for OS use of RTCLOK.
System Timer 1
System Timer 1 is maintained as part of the stage 1 VBLANK process,
and thus has the highest ~riority of any of the user timers.
P4
CDTMVI [0218,2] -- System Timer 1 value
CDTHVI contains zero when the timer is inactive, otherwise it
contains the number of VBLANKs remaining until timeout. Also see
H26.
P5 CDTMAl [0226,23 -- System Timer 1 Jump address
CDTMAl contains the address to which to JSR should the timer
timeout. See also H27 and Section 6.
OPERATING SYSTEM C016555 -- Appendix L
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