ADInstruments PowerLab/4SP Owner's Manual page 38

Figure A–3
Block diagram of the
PowerLab/16
SP
30
voltage exceeds 2.9 volts. This signal is fed to circuitry that notifies
the CPU that an external trigger event has been detected. The CPU
then carries out the task for which the trigger is being used (such as
pre-triggering or post-triggering). When the trigger threshold is
crossed, the indicator beside the trigger connector glows yellow.
Two 14-bit DACs (digital-to-analog converters) are used to control the
analog outputs of the PowerLab (marked 'Output 1' and 'Output 2'
on the front panel). The DACs produce waveforms under software
control that are fed through an attenuation network to produce
different full-scale ranges. The signals are then buffered by a power
I 2 C Port
SCSI PORT
I 2 C
Controller
SCSI
Controller
LATCH
LATCH
SYSTEM GLUE
& REAL-TIME
FIFO
CLOCK
SAMPLING
CONTROL
GLUE
Analog Output External Trigger
Analog Output Ext Trigger
USB Port
USB
Controller
ROM
MC68340
RAM
CPU
FIFO
Digital Output Digital Input
FIFO
LATCH
16-BIT ADC
Multiplexer
Analog Input
Analog Input Channels
PowerLab Owner's Guide
POWER
SUPPLY
50/60Hz
MAINS
SYNC