Advanced Chipset Features; Dram Timing Selectable; Active To Precharge Delay - ROHS ITX-i7418VL User Manual

BIOS

3.5 Advanced Chipset Features

DRAM Timing Selectable

It refers to the method by which the DRAM timing is selected.
Setting: Manual, By SPD (Default).
CAS Latency Time
It allows CAS latency time in HCLKs as 2 or 2.5. The system board designer
should set the values in this field, depending on the DRAM installed. Do
not change the values in this field unless you change specifications of the
installed DRAM or CPU.
Setting: 2.5 (Default), 2.

Active to Precharge Delay

Setting: 7 (Default), 6, 5.
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