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Parameter
Command Processing Time
(Average time for output voltage to change after receipt of digital data
when the unit is connected directly to the GPIB Bus):
Output Voltage Rise Time/Fall Time
(time for output to change from 90 % to 10% or from 10% to 90% of its
total excursion with full resistive load)
Full-load Programming Speed Up Time/Down Time
(time for output to settle within 4 LSBs of the final value with full
resistive load)
No-load Programming Discharge Time
(time for output to fall to 0.5V when programmed from full voltage
to zero volts)
Monotonicity:
Auto-Parallel Configuration:
Analog Programming (IP&VP)
(signal source must be isolated;
VP input is referenced to output
signal common)
Current Monitor Output (+IM)
(signal range corresponds to from
0% to 100% of output current)
Nonvolatile Savable States
Digital Port Characteristics
FLT/INH Terminals 1 & 2
FLT/INH Terminals 3 & 4
Digital OUT Port 0,1,2 -
Open Collector:
Digital IN Port 2 -
Internal 4.64 k Pullup:
GPIB Interface Capabilities
Serial Link Capabilities
(multiple units sharing one
GPIB primary address)
Recommended Calibration
Interval:
Table A-2. Supplemental Characteristics (continued)
VP Input Impedance:
IP to –IP Differential Input:
Memory Write Cycles:
Factory Prestored State:
I
(low-level output current)
ol
V
(low-level output voltage)
ol
V
(low-level input voltage)
il
V
(high-level input voltage)
ih
I
(low-level input current)
il
I
(high-level output leakage @ 16.5V)
oh
I
(high-level output leakage @ 5.25V)
oh
I
(low-level output sink current @ 0.5V)
ol
I
(low-level output sink current @ lV)
ol
I
(low-level input current @ 0.4 V)
il
I
(high-level input current @ 5.25 V)
ih
V
(low-level input voltage)
il
V
(high-level input voltage)
ih
Maximum number of units:
Maximum number of linked units:
Maximum total chain cable length:
(excludes command processing time)
(excludes command processing time)
(excludes command processing time)
Output is monotonic over entire rated
voltage, current, and temp. range.
VP Input Signal:
IM Output Signal:
Output Impedance:
Memory Locations:
Maximum ratings:
16.5 Vdc between terminals 1 & 2;
tw (pulse width)
td (time delay)
100 µA (ports 0,1); 12.5 mA (port 2)
100 µA (ports 0,1); 250 µA (port 2)
Languages:
Interface:
Value
20 ms
100 ms/200 ms
200 ms/475 ms
650 ms
Up to 3 units
0 to –4.15 V
60 kΩ, nominal
0 to +6.75 V
–0.25 to –8.08 V
490 Ω
5 ( 0 through 4)
40,000, typical
Location 0
3&4; and from 1 or 2 to chassis.
1.25 mA maximum
0.5 V maximum
0.8 V maximum
2.0 V minimum
1 mA
100 µs, minimum
4 ms, typical
4 mA
250 mA
1.25 mA
250 µA
0.8 V maximum
2.0 V minimum
SCPI (default); Compatibility
AH1, C0, DC1, DT1, E1, LE4,
PP0, RL1, SH1, SR1, TE6
16
15
30 m (100 ft)
1 year
Specifications 95
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