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UM027 FC6301 User Manual
3 Installation
3.1 Requirements and handling instructions
The FC6301 daughter card must be installed cPCI backplane compliant to the cPCI
standard.
Do not flex the board and prevent electrostatic discharges by observing ESD
precautions when handling the card.
3.2 Firmware and Software
Drivers, API libraries and a program example working in combination with a pre-programmed
firmware for the FPGA is provided. The FC6301 is delivered with an interface to the Xilinx
PCIexpress endpoint in the Virtex-6 device and an example VHDL design so users can start
performing data transfers over the PCI bus right out of the box. For more information about
software installation and FPGA firmware, please refer the 4FM Get Started Guide.
4 Hardware Specification
4.1 Phycisal specifications
The FC6301 card complies with the compact PCI standard known as PICMG 2.0 R3.0. The
card is a 3U (100 mm by 160 mm) module which incorporates a 32 bits PCI bus on the P1
connector. The P2 connector is fully routed to the Virtex6 FPGA through zero ohm resistors.
However the LX240T version of the Virtex6 FPGA does not completely support the P2
connector. Table 2 lists the signals the connections of P2 and which signals are not available
on the LX240T. Also addition: the zero ohm resistors are not mounted by default, contact
factory in case connections on P2 are required.
4.1.1 Front panel layout
There are three front panel options. One front panel is used when an FMC board is mounted.
The other front panel is used when the Ethernet IO option is chosen. And the third option has
no cutout at all.
UM027
Figure 2: FMC option Bezel drawing
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