Cpld Leds And Board Status; Jtag - 4DSP FC6301 User Manual

UM027 FC6301 User Manual

4.9.4 CPLD LEDs and board status

Four LEDs connect to the CPLD and give information about the board status.
LED 0 Flashing
ON
OFF
LED 1 ON
OFF
LED 2 Flashing
ON
OFF
ON
LED 3
OFF
Table 14: LED board status

4.9.5 JTAG

A JTAG connector footprint is available on the FC6301 for configuration purposes and the
JTAG chain can be accessed using a press-fit JTAG connector. The JTAG chain is
connected via a DIP switch that enables the following configurations:

CPLD -> FPGA

CPLD only
The JTAG connector can be placed on both sides of the PCB. The connector location seen
from the top of the PCB is shown in Figure 10.
TCK TDO
GND TDI
VCC TMS
Figure 7:JTAG connector location.
UM027
Virtex-6 FPGA bitstream or user_ROM_register is currently
being written to the flash
Virtex-6 FPGA device not configured
Virtex-6 FPGA device
Switch 1 is on position ON. The CPLD has been forced to
configure the FPGA with the safety configuration
Switch 1 is on position OFF.
The Virtex-6 has been configured with the safety configuration
bitstream programmed in the flash at factory because an
invalid bitstream was detected in the user configuration space.
Please write a valid Virtex-6 device A bitstream to the flash.
Flash is busy writing or erasing
Flash device is not busy
CRC error. Presumably a wrong or corrupted FPGA bitstream
has been written to the flash. Once on this LED remains on
No CRC error detected
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