IBM Power 595 Technical Overview And Introduction page 87

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Figure 2-31 POWER6 processor
The CMOS 11S0 lithography technology in the POWER6 processor uses a 65 nm fabrication
process, which enables:
Performance gains through faster clock rates from up to 5.0 GHz
Physical size of 341 mm
The POWER6 processor consumes less power and requires less cooling. Thus, you can use
the POWER6 processor in servers where previously you could only use lower frequency
chips due to cooling restrictions.
The 64-bit implementation of the POWER6 design provides the following additional
enhancements:
Compatibility of 64-bit architecture
– Binary compatibility for all POWER and PowerPC® application code level
– Support of partition migration
– Support big and little endian
– Support of four page sizes: 4 KB, 64 KB, 16 MB, and 16 GB
High frequency optimization
– Designed to operate at maximum speed of 5 GHz
Superscalar core organization
– Simultaneous multithreading: two threads
In-order dispatch of five operations (through a single thread) or seven operations (using
Simultaneous Multithreading) to nine execution units:
– Two load or store operations
– Two fixed-point register-register operations
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Chapter 2. Architectural and technical overview
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