IBM Power 595 Technical Overview And Introduction page 56

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The term system control structure (SCS) describes an area within the scope of hardware
platform management. It addresses the lower levels of platform management, for example the
levels that directly deal with accessing and controlling the server hardware. The SCS
implementation is also called the
The SCS can be seen as key infrastructure for delivering mainframe RAS characteristics (for
example CoD support functions, on-chip array sparing) and error detection, isolation, and
reporting functions (Instant failure detection, Isolation of failed parts, continued system
operation, deferred maintenance, Call-home providing detailed problem analysis, pointing to
FRU to be replaced. The SCS provides system initialization and error reporting and facilitates
service. Embedded service processor-based control cards reside in the CEC cage
(redundant System Controllers-SC), node (redundant Node Controllers-NC), and in the BPC.
Figure 2-7 shows a high-level view of a Power 595, together with its associated control
structure. The system depicted to the right is composed of CEC with many processor books
and I/O drawers.
HMC
ML4
Figure 2-7 System Control Structure (SCS) architecture
The System Controllers's scope is to manage one system consisting of one or more
subsystems such as processor books (called
subsystem.
In addition to the functional structure, Figure 2-7 also shows a system-control infrastructure
that is orthogonal to the functional structure.
To support management of a truly modular server hardware environment, the management
model must have similar modular characteristics, with pluggable, standardized interfaces. his
44
IBM Power 595 Technical Overview and Introduction
out-of band service subsystem
BPH
Node-1 NC
Node-1 NC
BPC
ML2
ML2
Node-2 NC
Node-2 NC
BPC
ML2
ML2
Node-3 NC
Node-3 NC
SC
ML2
ML2
ML3
Node-4 NC
Node-4 NC
ML2
ML2
SC
Node-5 NC
ML3
Node-5 NC
ML2
ML2
Node-6 NC
Node-6 NC
ML2
ML2
Node-7 NC
Node-7 NC
ML2
ML2
Node-8 NC
Node-8 NC
ML2
ML2
.
Serial link FSI
S ubsystem
Controller
(S P)
ML1
FSI
PSI
CFAM-S
FSI
S ubsystem
PSI
Controller
(S P)
FSI
CFAM
Implemented on
System chip
nodes
), I/O drawers and the power control
FRU Support Interfaces
•JTAG
•UART
•I2C
•GPIO
SC
uchip
I/ O chip
NC
ML1
System

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