Aaeon SBC-400 User Manual page 51

Function
SRAM Write Timing
Parity check
Hidden Refresh
Cyrix CPU L1 Cache Mode
ISA I/O Recovery
CPU to PCI Write Buffer
Byte Merge
Fast Back to Back
C x 5 x 86 Linear Wrapped Mode
PCI IDE Trigger Type
44 SBC-400 User's Manual
Options
0 W
1 W
Disabled
Enabled
Disabled
Enabled
WT (Write-through)
WB (Write-back)
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Edge
Level