Aaeon SBC-400 User Manual page 37

IRQ11 IRQ12
IRQ12 IRQ11
1 2
If CPU processing comes to a halt because of EMI or software bug,
the watchdog timer can either reset the CPU or signal an interrupt
on IRQ15.
Reset CPU
The watchdog timer must be programmed to write to I/O port
address 443 at an interval shorter than the timer's preset interval.
The timer's interval has a tolerance of ±5%, so you should program
an instruction that will refresh the timer before a time-out occurs.
3 1 2 3
IRQ15