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1.3 Technical Specifications
Ta b l e 1 : C O M e - b P 5 0 2 0 M a i n S p e c i f i c a ti o n s
COMe-bP5020
CPU
Integrated Controllers
Memory
10
The COMe-bP5020 supports the following microprocessor:
» Freescale™ QorIQ™ P5020 processor, 2.0 GHz
(other operating speeds and processor variants (P5010/P3041) are available on
request)
Further processor features:
» Two 64-bit execution cores
» System Memory interface with optimized support for dual-channel DDR3 SDRAM
memory at 1300 MHz with ECC for the QorIQ™ P5020 processor with 2.0 GHz CPU fre-
quency
Controllers integrated in the CPU and utilized by the COMe-bP5020:
» eSDHC, eLBC, DUART, dTSEC, PCIe, sRIO, SPI, I2C
Main memory:
» Up to 8 GB, dual-channel DDR3 SDRAM memory with ECC running at up to 1300 MHz
Cache structure:
» 64 kB L1 cache for each core
» 32 kB instruction cache
» 32 kB data cache
» 512 kB backside L2 cache for each core
» 2 MB shared L3 CoreNet platform cache (1 MB per memory channel)
Flash memory:
» Two SPI boot flashes (2 x 2 MB) for U-Boot selectable via the DIP switch
» One 8 MB SPI flash for operating system or application
Mass storage device:
» Up to 2 GB NAND flash via an integrated/embedded NAND flash controller
» Up to 32 GB microSDHC flash via an integrated SDHC controller
MRAM memory:
» 512 kB of non-volatile memory
Two serial EEPROMs with 64 kbit:
» One for system data storage
» One free for user data storage
SPECIFICATIONS
User Guide
COMe-bP5020
www.kontron.com
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