Teridian 73S1209F User Manual

Evaluation board
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TM
Simplifying System Integration
73S1209F

Evaluation Board User Guide

August 19, 2009
Rev. 1.3
UG_1209F_034

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Summary of Contents for Teridian 73S1209F

  • Page 1: Evaluation Board User Guide

    Simplifying System Integration 73S1209F Evaluation Board User Guide August 19, 2009 Rev. 1.3 UG_1209F_034...
  • Page 2 Keil is a trademark of ARM® Ltd. All other trademarks are the property of their respective owners. Teridian Semiconductor Corporation makes no warranty for the use of its products, other than expressly contained in the Company’s warranty detailed in the Teridian Semiconductor Corporation standard Terms and Conditions.
  • Page 3: Table Of Contents

    Figure 9: 73S1209F Evaluation Board Bottom View (Silkscreen) ............19 Figure 10: 73S1209F Evaluation Board Top Signal Layer ..............20 Figure 11: 73S1209F Evaluation Board Middle Layer 1 – Ground Plane ..........21 Figure 12: 73S1209F Evaluation Board Middle Layer 2 – Supply Plane ..........22 Figure 13: 73S1209F Evaluation Board Bottom Signal Layer ..............
  • Page 4: Introduction

    1 Introduction The Teridian Semiconductor Corporation (TSC) 73S1209F Evaluation Board is used to demonstrate the capabilities of the 73S1209F Smart Card Controller device. It has been designed to operate either as a standalone or as a development platform. The 73S1209F Evaluation Board can be programmed to run any of the Teridian turnkey applications or a user-developed custom application.
  • Page 5: Evaluation Kit Contents

    2 line x 16 character LCD module • 6 x 5 Keypad • 2 LEDs Recommended Equipment and Test Tools The following equipment and tools (not provided) are recommended for use with the 73S1209F Evaluation Kit: • ® ® ®...
  • Page 6: Evaluation Board Setup

    The board is loaded by default with the PCCID application. It requires a PC to be connected through its serial port. When powered-up, the board is able to run with the PC Exerciser host application. Refer to the 73S1209F Evaluation Board Quick Start Guide to setup and run the PCCID application. +2.7 V to +4.0 V to...
  • Page 7: Connecting The Evaluation Board With An Emulation Tool

    UG_1209F_034 73S1209F Evaluation Board User Guide Connecting the Evaluation Board with an Emulation Tool The 73S1209F Evaluation Board has been designed to operate with an In-Circuit-Emulator (ICE) from Signum Systems (model ADM-51). Figure 3 shows the connections between the ICE and the evaluation board.
  • Page 8: Loading User Code Into The Evaluation Board

    Loading Code with the In-Circuit Emulator If firmware exists in the 73S1209F flash memory, the memory must be erased before loading a new file into memory. In order to erase the flash memory, the RESET button in the emulator software must be...
  • Page 9: Figure 4: Emulator Window Showing Reset And Erase Buttons

    UG_1209F_034 73S1209F Evaluation Board User Guide RESET BUTTON ERASE BUTTON Figure 4: Emulator Window Showing RESET and ERASE Buttons Figure 5: Emulator Window Showing Erased Flash Memory and File Load Menu Rev. 1.3...
  • Page 10: Using The Pccid Application

    UG_1209F_034 3 Using the PCCID Application The PCCID firmware is pre-installed on the 73S1209F Evaluation Board. It requires a PC with the serial RS-232 port. When powered-up, the board is able to run the PCCID demonstration host application which allows: •...
  • Page 11: Evaluation Board Hardware Description

    73S1209F Evaluation Board User Guide 4 Evaluation Board Hardware Description Jumpers, Switches and Modules Table 2 describes the 73S1209F Evaluation Board jumpers, switches and modules. The Item # in Table 2 references Figure 6. The default setting refers to setup for running USB-CCID application.
  • Page 12 LCD module. S2 to S31 On-board keypad 5x6 keyboard directly connected to the on-board 73S1209F IC. The assignment of the keys, as silk-printed on the PCB is the one supported by the TSC Application Programming Interface. – Board reference and...
  • Page 13 In normal use, a jumper must be inserted in this header to connect the +5.0 V power supply of the board to the VPC pins of the 73S1209F. This jumper can be replaced by a µA / mA-meter to measure the actual current drawn by the 73S1209F.
  • Page 14 USR6: Inserted • In position “USR6”, the 73S1209F USR6 signal is connected to the daughter card pin USR6. • In position “SCL”, the I2C SCL signal is connected to the daughter card pin USR6. This allows the SCL line to connect to an SCL pin on a 73S8010R daughter card.
  • Page 15: Figure 6: 73S1209F Evaluation Board Jumper, Switch And Module Locations

    UG_1209F_034 73S1209F Evaluation Board User Guide TERIDIAN Figure 6: 73S1209F Evaluation Board Jumper, Switch and Module Locations Rev. 1.3...
  • Page 16: Test Points

    2-pin test point, with one ground and one VDD signal directly connected to the 73S1209F and its decoupling capacitors. Can be used to measure the integrity of the digital power supply of the 73S1209F, or to add a decoupling capacitor.
  • Page 17: Schematic

    R19, R20, R21, R22 and R23 close to U6 SY M1 1000pF 20 pF 20 pF 20 pF 20 pF 20 pF PROTO TY PE AREA MOUNT HOLES FOR STAND OFFS Logo TERIDIAN LOGO Figure 7: 73S1209F Evaluation Board Electrical Schematic Rev. 1.3...
  • Page 18: Pcb Layouts

    73S1209F Evaluation Board User Guide UG_1209F_034 PCB Layouts Figure 8: 73S1209F Evaluation Board Top View (Silkscreen) Rev. 1.3...
  • Page 19: Figure 9: 73S1209F Evaluation Board Bottom View (Silkscreen)

    UG_1209F_034 73S1209F Evaluation Board User Guide Figure 9: 73S1209F Evaluation Board Bottom View (Silkscreen) Rev. 1.3...
  • Page 20: Figure 10: 73S1209F Evaluation Board Top Signal Layer

    73S1209F Evaluation Board User Guide UG_1209F_034 Figure 10: 73S1209F Evaluation Board Top Signal Layer Rev. 1.3...
  • Page 21: Figure 11: 73S1209F Evaluation Board Middle Layer 1 - Ground Plane

    UG_1209F_034 73S1209F Evaluation Board User Guide Figure 11: 73S1209F Evaluation Board Middle Layer 1 – Ground Plane Rev. 1.3...
  • Page 22: Figure 12: 73S1209F Evaluation Board Middle Layer 2 - Supply Plane

    73S1209F Evaluation Board User Guide UG_1209F_034 Figure 12: 73S1209F Evaluation Board Middle Layer 2 – Supply Plane Rev. 1.3...
  • Page 23: Figure 13: 73S1209F Evaluation Board Bottom Signal Layer

    UG_1209F_034 73S1209F Evaluation Board User Guide Figure 13: 73S1209F Evaluation Board Bottom Signal Layer Rev. 1.3...
  • Page 24: Bill Of Materials

    73S1209F Evaluation Board User Guide UG_1209F_034 Bill of Materials Table 4 provides the bill of materials for the 73S1209F Evaluation Board schematic provided in Figure Table 4: 73S1209F Evaluation Board Bill of Materials Digi-key Part Item Qty. Reference Part PCB Footprint...
  • Page 25 UG_1209F_034 73S1209F Evaluation Board User Guide Digi-key Part Item Qty. Reference Part PCB Footprint Part Number Manufacturer Number +12VDC RAPC722 SC1153-ND RAPC722 Switchcraft DB9_RS232 AMP_745781 A2100-ND 745781-4 AMP/Tyco Electronics 10 kΩ 3266W 3266W-103-ND 3266W-1-103 Bourns 0 Ω R1,R6,R24-33 P0.0GCT-ND ERJ-3GEY0R00V Panasonic 470 Ω...
  • Page 26 73S1209F Evaluation Board User Guide UG_1209F_034 Digi-key Part Item Qty. Reference Part PCB Footprint Part Number Manufacturer Number LM1117DT-5.0 TO-252-3 LM1117DT-5.0-ND LM1117DT-5.0 National Semiconductor LP2985 LP2985IM5-3.3CT- LP2985IM5-3.3 National Semiconductor 73S8010R 73S8010R Teridian Semiconductor MDL-16265 153-1078-ND MDL-16265-SS-LV Varitronix 73S1209F 68 QFN...
  • Page 27: Schematic Information

    Figure 14: External Components for RESET 4.6.2 Oscillators The 73S1209F contains an oscillator for the primary system clock. The system clock should use a 12 MHz crystal to provide the proper system clock rates for the serial and smart card interfaces. The system oscillator requires a 1 MΩ...
  • Page 28: Lcd

    The 73S1209F does not contain an on-chip LCD controller. However, an LCD module (with built-in controller) can be used with the 73S1209F via use of specific USR (GPIO) pins. The LCD API libraries support up to a 2 line/16 character display.
  • Page 29: Smart Card Interface

    10 µF and a 0.1 µF capacitor are connected to provide proper decoupling for this input. • The PRES input on the 73S1209F contains a very weak pull down resistor. As a result, an additional external pull down resistor is recommended to prevent any system noise from triggering a false card event.
  • Page 30: Ordering Information

    73S1209F Evaluation Board Quick Start Guide TSC Flash Programmer Model TFP2 User's Manual 7 Contact Information For more information about Teridian Semiconductor products or to check the availability of the 73S1209F contact us at: 6440 Oak Canyon Road Suite 100...
  • Page 31: Revision History

    UG_1209F_034 73S1209F Evaluation Board User Guide Revision History Revision Date Description January 22, 2007 Document Creation. April 2, 2007 Update BOM and change to Rev C PWB. Remove board errata section. August 8, 2007 Modify incorrect part number for S1 in BOM.
  • Page 32 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Maxim Integrated 73S1209F-EB...

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