Integra DTR-5.9 Service Manual page 75

Av receiver
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3 7 63 1515 0
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-38
Q8401
: SiI9134CTU (HDMI Deep Color Transmitter)-4/4
TERMINAL DESCRIPTION
Differential Signal Data Pins
Pin Name
TX0+
TX0-
TX1+
TX1-
TX2+
TX2-
TXC+
TXC-
EXT_SWING
Power and Ground Pins
Pin Name
CVCC18
IOVCC33
AVCC33
AVCC18
AGND
PVCC1
TE
L 13942296513
PVCC2
DDCPWR5V
GND
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Pin #
Dir
Description
34
Output
TMDS output data pairs.
33
Output
37
Output
36
Output
40
Output
39
Output
31
Output
TMDS output clock pair.
30
Output
27
Input
Voltage Swing Adjust. A resistor is tied from this pin to AVCC.
This resistor determines the amplitude of the voltage swing.
Pin #
Type
12, 55, 64, 76, 99
Power
14, 53, 66, 89
Power
44
Power
32, 38
Power
26, 29, 35, 41, 43
Ground
28
Power
42
Power
45
Power
13, 54, 65, 87, 100
Ground
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y
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8
Description
Digital Core VCC. Connect to 1.8V supply.
IO Pin VCC. Connect to 3.3V supply.
Analog VCC. Connect to 3.3V supply.
Analog VCC. Connect to 1.8V supply.
Analog GND.
Q Q
TMDS Core PLL Power. Connect to 1.8V supply.
3
6 7
1 3
Filter PLL Power. Connect to 1.8V supply.
Power reference signal. Used to supply power to the DDC 0I2C pads
when chip is powerd off. Connect to 5V supply.
Digital Ground.
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2 9
9 4
2 8
1 5
0 5
8
2 9
9 4
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co
DTR-5.9
9 9
2 8
9 9

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