Voltage Monitoring Circuit - Pioneer DJM-900NXS Service Manual

5

5.4 VOLTAGE MONITORING CIRCUIT

Voltage-Monitoring Circuit
This unit monitors the voltages of the main power-supply ICs, using the VDET signal.
The VDET signal level is middle (+1.08 V to +1.32 V) during normal operations. When the level becomes outside the middle
level, as shown in the table below, an error is informed to the MAIN CPU (IC2011).
Product behavior when an error is generated
Upon reception of the VDET signal that informs of power failure, the MAIN CPU sets the P-CON signal to Low and stops the
switching-system output from SW power.
MAIN ASSY
VMUTE
V+12D
V+15A
V-15A
V+5A
The MAIN_CPU controls
power output.
P-CON
V+12E
Always output during power-on
The MAIN CPU also informs of power failure with flashing of the LFO FORM button, by sending the STBY_LED signal:
Flashing intervals: 250 ms (lit for 125 ms/unlit for 125 ms)
As the switching-system output is stopped, the indications other than the LFO FORM button are unlit and all the switches
and VRs are disabled.
Schematic diagram of the voltage monitoring section
Analog voltage abnormality detect circuit
V+15A_1
S T B Y
R 1 2 1 0
H N 1 A 0 1 F U ( Y G R )
Q 1 2 0 1 (1/2)
A side
1 6
R 1 2 0 9
V+5A 2 A side
1 k
V-15A_1
V-15A_1
D1201
1SS301
5
6
V+34D
V+12D
V+5D Monitoring
V+3R3D
V+2R5D
V+1R2D
V+15A
V-15A
V+5A
H: SW power is output.
L: SW power output is stopped.
V+3R3E
IC1404
G
MAIN ASSY
V+5A
N M
4
5
3
6
7
Voltage
monitoring
circuit
VDET
H: Abnormal
Mid: Normal
L: Abnormal
PNLA ASSY
STBY_LED
MAIN_CPU
(IC2011)
V+12D
VADET
R 1 2 2 2
0
GNDD
GNDD
DJM-900NXS
7
8
LFO FORM LED
D6624 (RED)
Flashing when
an error occurs
3:2C
To Power Block
V A D E T
Low value Hi value
V+5A 4.28V 5.61V
9.94V
V+9HP 8.23V
-11.82V
V-9HP -5.96V
16.74V
V+15A 13.38V
-18.57V
V-15A -11.83V
8
A
B
C
D
E
F
41