Pioneer DJM-900NXS Service Manual page 28

1
A
No. Cause Diagnostics Point
MAIN Assy
[POWER]
DSP (IC701) L702
does not start. L701
L703
Devices R782
3
• DSP (IC701) [RESET]
• FLASH (IC703)
R671
• SDRAM (IC702) R674
[CLK]
R896
B
[1-4] The unit does not turn on, and the LED of the LFO FORM (WAKE UP) flashes five times.
Communication error between MAIN_CPU (IC2011) and SUB_UCOM (IC6601).
No. Cause Diagnostics Point
PNLB Assy
SUB_UCOM
[POWER]
(IC6601) does
R6615
not start.
1
[RESET]
R6611
Devices
[CLK]
• SUB_UCOM
X6601
(IC6601)
C
[1-5] The unit does not turn on, and the LED of the LFO FORM (WAKE UP) flashes six times.
Communication error between MAIN_CPU (IC2011) and USB_UCOM (IC1801).
No. Cause Diagnostics Point
MAIN Assy
USB_UCOM
[POWER]
(IC1801) does
L1802
not start.
L1801
1
R1806
Devices
R1817
• USB_UCOM
[RESET]
(IC1801)
D
C1831
• SDRAM
[CLK]
(IC1802)
R2304
[1-6] The unit does not turn on, and the LED of the LFO FORM (WAKE UP) flashes seven times.
Communication error between MAIN_CPU (IC2011) and DIT (IC2405).
No. Cause Diagnostics Point
MAIN Assy
[POWER]
R2425
Power
E
1 [RESET]
Signal line
C2411
[CLK]
R2409
MAIN Assy
2 Defective part
DIT (IC2405)
[1-7] The unit does not turn on, and the LED flashes endlessly.
The unit is shut down in error by the Power Monitoring Circuit.
No. Cause Diagnostics Point
F
See "5.4 VOLTAGE
1 Power failure
MONITORING CIRCUIT."
28
1
2
Item to be Checked
[POWER]
V+3R3D_DSP
V+1R2D_DSP
1-55
V+1R2D_DPLL
1-56
V+3R3D_DSP_MEM
1-57
[RESET]
1-58
DSP_RESET
Check that the signal level of DFLASH_RST
1-26
is High.
1-27
[CLK]
Check if the 24 MHz clock is input to
1-59
24.5M_CLK_DSP.
Item to be Checked
[POWER]
V+3R3D_PA
[RESET]
Check that the signal level of SUB_CPU_
4-19
RESET is High.
[CLK]
4-17
Check if the 20 MHz clock is input.
As the drive circuit is in an IC, a normal
4-18
waveform check cannot be performed.
Simply check whether or not it oscillates.
Item to be Checked
[POWER]
V+1R2D_USB
V+3R3D_USB
1-31
V+3R3D_USB_MEM
1-32
V+2R5D_USB_PLL
1-33
[RESET]
1-34
Check that the signal level of USB_RESET
is High.
1-36
[CLK]
Check if the 24 MHz clock is input to
1-35
24M_CLK_USB.
Item to be Checked
[POWER]
Check for the voltage of the V+3R3D_DIT
power.
1-73
[RESET]
Check that the signal level of DIT_RESET
1-69
is High.
1-68
[CLK]
Check that 24M CLK is input.
If the symptom persists after the above
corrections.
Item to be Checked
Check for power at each point, following
"5.4 VOLTAGE MONITORING CIRCUIT."
2
3
[POWER]
If an error is detected, check for the power supply
source on the power supply block diagram, and
repair it if it has an error.
[RESET]
If the signal level is not High, check for the signal
supply source of the RESET signal, and repair it if
it has an error.
[CLK]
If no signal is input, check for the signal supply
source of the CLK signal and repair it if it has an
error.
[POWER]
If an error is detected, check for the power supply
source on the power supply block diagram, and
repair it if it has an error.
[RESET]
If the signal level is not High, check for the signal
supply source of the RESET signal, and repair it if
it has an error.
[CLK]
If no signal is input, check for the signal supply
source of the CLK signal and repair it if it has an
error.
[POWER]
If an error is detected, check for the power supply
source on the power supply block diagram, and
repair it if it has an error.
[RESET]
If the signal level is not High, check for the signal
supply source of the RESET signal, and repair it if
it has an error.
[CLK]
If no signal is input, check for the signal supply
source of the CLK signal and repair it if it has an
error.
[POWER]
If an error is detected, check for the power supply
source on the power supply block diagram, and
repair it if it has an error.
[RESET]
If the signal level is not High, check for the signal
supply source of the RESET signal, and repair it if
it has an error.
[CLK]
If no signal is input, check for the signal supply
source of the CLK signal and repair it if it has an
error.
DIT (IC2405) may be defective.
Replace it.
Repair the defective parts.
DJM-900NXS
3
4
Corrective Action
[POWER]
4.3 POWER
BLOCK DIAGRAM
5.3
INFORMATION ON
POWER
DIAGNOSTICS
[RESET]
10.41 WAVEFORMS
MAIN ASSY
[CLK]
10.41 WAVEFORMS
MAIN ASSY
Corrective Action
[POWER]
4.3 POWER
BLOCK DIAGRAM
5.3
INFORMATION ON
POWER
DIAGNOSTICS
[RESET]
10.41 WAVEFORMS
PNLB ASSY
[CLK]
10.41 WAVEFORMS
PNLB ASSY
Corrective Action
[POWER]
4.3 POWER
BLOCK DIAGRAM
5.3
INFORMATION ON
POWER
DIAGNOSTICS
[RESET]
10.41 WAVEFORMS
MAIN ASSY
[CLK]
10.41 WAVEFORMS
MAIN ASSY
Corrective Action
[POWER]
4.3 POWER
BLOCK DIAGRAM
5.3
INFORMATION ON
POWER
DIAGNOSTICS
[RESET]
10.41 WAVEFORMS
MAIN ASSY
[CLK]
10.41 WAVEFORMS
MAIN ASSY
Corrective Action
5.4 VOLTAGE MONI-
TORING CIRCUIT
4
Reference
1-26 1-27
1-59
Reference
4-17
4-18
Reference
1-36
1-35
Reference
1-69
1-68
—
Reference