Frequency Synthesizer Circuits; Power Supply Circuits - Icom IC-F33GT Service Manual

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5-3 FREQUENCY SYNTHESIZER CIRCUITS

VCO
A VCO is an oscillator which its oscillation frequency is
determined by the applied volatge.
Shifting the oscillation frequency range in RX/TX, the VCO
generates both of the TX signal and 1st LO signals.
There are two VCOs; RX VCO and TX VCO. The RX VCO
generates the 1st LO signals for the 1st IF produce, and TX
VCO generates TX signal.
The VCO circuits contains a separate RX VCO (Q17, D9,
D11, D500) and TX VCO (Q16, D10, D13, D501). The oscil-
lated signal is amplified at the buffer amplifiers (Q15, Q29)
and is then applied to the T/R switch (D16, D17). Then the
receive 1st LO (Rx) signal is applied to the 1st mixer (Q6)
and the transmit (Tx) signal to the YGR amplifier circuit (PA
unit; Q704).
A portion of the signal from the buffer amplifier (Q15) is fed
back to the PLL IC (IC21, pin 6) via the doubler circuit (Q14)
as the comparison signal.
PLL (Phase Locked Loop) CIRCUIT
The PLL circuit provides stable oscillation for both of the
transmit frequency and 1st LO frequency for receive. By
comparing feedbacked VCO output and reference frequency
signal and adjusting the differences.
The PLL output frequency is controlled by the serial data
including divid ratio from the CPU.
• FREQUENCY SYNTHESIZER CIRCUITS
Buffer
Q21
"LVIN" signal
to the CPU
(IC22, pin 49)
45.9 MHz 2nd LO
signal to the FM IF IC
(IC9, pin 2)
5-4 POWER SUPPLY CIRCUIT
LINE
VCC
The voltage from the connected battery pack.
Common 5 V converted from the VCC line at the +5 regulator circuit (IC17). The output voltage is supplied to the buf-
+5V
fer amplifi ers (Q21), PLL IC (IC21) etc.
Common 5 V converted from the VCC line at the S5 regulator circuit (Q26–Q28). The output voltage is supplied to
S5V
the ripple fi lter (Q20), etc.
Receive 5 V converted from the S5V line at the R5 regulator circuit (Q25). The output voltage is supplied to the tripler
R5V
(Q22), FM IF IC (IC9), IF amplifi er (Q7), 1st mixer (Q6), RF amplifi er (Q5), etc.
Transmit 5 V converted from the S5V line at the T5 regulator circuit (Q24). The output voltage is supplied to the APC
T5V
amplifi er (IC2), PA unit, etc.
RX VCO
Q17, D9, D11, D500
TX VCO
Q16, D10, D13, D501
Loop
filter
Phase
4
detector
Programmable
divider
Tripler
10
3
Q22
A portion of VCO output is applied to the PLL IC via buffer
and harmonic filter. The applied VCO output is divided
according to the serial data including divid ratio from
the CPU, at the prescaler and programmable divider. In
the same way, the reference frequency signal from the
reference frequency signal oscillator is applied to the PLL
IC and divide so that these are the same frequency.
The VCO output and the reference frequency signals
divide and frequency-matched are applied to the phase
comparator and phase-compared. The resulted phase
difference is detected as a phase-type signal, and level-
adjusted at the charge pump then output. The output pulse
type signal is passed through the loop filter to be converted
into the DC voltage (=Lock Voltage).
Applying the lock voltage to the variable capacitor which
composes a part of the resonator of VCO, the capasitance
of VD changes corresponding to the appled lock voltage.
This causes the change of resonation frequency that
determine the VCO oscilation frequency to keep the VCO
frequency constant.
The PLL circuit contains the TX and RX VCO circuits (Q16,
Q17, D9–D11, D13, D500, D501). The oscillated signal is
amplified at the buffer amplifier (Q15). The output signal fre-
quency is doubled at Q14, and is then applied to the PLL IC
(IC21, pin 6) after being passed through the bandpass filter
(L32, C205, C507).
Q500, D502 and D503 switch the filtering frequencies
between TX and RX which is controlled by R5V.
When the oscillation frequency drifts, its phase changes
from that of the reference frequency, causing a lock voltage
change to compensate for the drift in the VCO oscillating
frequency.
Buffer
Q15
IC21 LMX2352
Programmable
Prescaler
counter
Shift register
X2
15.3 MHz
DESCRIPTION
4 - 4
D17
Buffer
to 1st mixer circuit
Q29
D16
to transmitter circuit
×2
Q14
BPF
6
14
SCK
15
SO
16
PLST

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