4-3 FREQUENCY SYNTHESIZER CIRCUITS
The RX VCO is composed of Q6, D7 and D10. The VCO out-
put signal is buffer-amplified by two buffers (Q11 and Q16)
and applied to the 1st IF mixer, through the LO SW (D13)
and the LPF (L17, C126 and C131).
The TX VCO is composed of Q5, D6, D8 and D9. The VCO
output signal is buffer-amplified by two buffers (Q11 and
Q16) and applied to the pre-amp (Q18), through the LO SW
(D12).
A portion of signal, which is generated by each VCO, is fed
back to the PLL circuit in the IF IC (IC2), through the buffer
(Q13).
The applied VCO output signal is divided and phase-com-
pared with a 15.3 MHz reference frequency signal from the
TCXO (X1), which is also divided. The resulting signal is
output from the PLL IC (IC1), and DC-converted by the loop
fi lter (R18, R22, C23, C28 and C31), and then applied to the
VCO as the lock voltage.
When the oscillation frequency drifts, its phase changes
from that of the reference frequency, causing a lock voltage
change to compensate for the drift in the VCO oscillating fre-
quency.
• FREQUENCY SYNTHESIZER CIRCUITS
D8
Q5,
D6,9
FM
MOD
MOD
TX VCO
Q6,
D7,10
IC1
LOOP
RX VCO
LVIN
SW
FIL
IC2
PLL
45.9 MHz
BUFF
X3
REF
X1
15.3 MHz
D12,13
Q11
Q16
RF
TX/RX
To the TX AMP
BUFF
AMP
SW
353.65-
LPF
423.65 MHz
Q13
BUFF
Q45
1st_MIX
BUFF
2nd_MIX
4-4 VOLTAGE DIAGRAMS
Voltage from the power supply is routed throughout the
transceiver, through regulators and switches.
VCC
BATT
BATV
MONI
IC4
+5
5V
REG
Q2,3
DC_SW
S5V
PWON
S5V
S5C
Q14,15
DC_SW
T5V
T5V
TXC
Q19,20
DC_SW
R5V
R5V
IC7,D33
RXC
DC-DC
CPUV
3.3V
Q37,38
3.3V
DC_SW
.3V_VDD
3.3V_D
PWON
IC13
3.3V_A
1.6V_D
DC-DC
1.6V
3.3V
4-3
HV
Q33,26,
D29
POSWH
F1
DC_SW
2
1
PWON
PWR SW
3.3V
AFVI
R141
AF VOL
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