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FO-4450U/FO-CS1
MMU
TLB
CCN
CACHE
BRIDGE
H-UDI
INTC
CPG/WDT
EXTERNAL BUS
INTERFACE
Legend:
ADC:
A/D converter
AUD:
Advanced user debugger
BSC:
Bus state controller
CACHE:
Cache memory
CCN:
Cache memory controller
CMT:
Compare match timer
CPG/WDT:
Clock pulse generator/watchdog timer
CPU:
Central processing unit
DAC:
D/A converter
CPU
UBC
AUD
BSC
DMAC
CMT
I/O PORT
DMAC:
Direct memory access controller
H-UDI:
Hitachi user-debugging interface
INTC:
Interrupt controller
MMU:
Memory management unit
RTC:
Realtime clock
SCI:
Serial communication interface (with smart card interface)
SCIF:
Serial communication interface (with FIFO)
TLB:
Address translation buffer
TMU:
Timer unit
UBC:
User break controller
Fig. 2 HD6417706F133 BLOCK DIAGRAM
5 – 2
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SCI
TMU
RTC
SCIF
ADC
DAC
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