Marantz CDR631 Service Manual page 27

Block diagram of MC44603
DEMAGNETISATION
DETECT
8 DEMAGNETISATION
MANAGEMENT
9
SYNC INPUT
10
CT
15
RF STANDBY
12
RP STANDBY
2.5V
VOLTAGE ERROR
AMP
14
FEEDBACK
13
E/A OUT
FOLDBACK
FOLDBACK
INPUT
5
Operating description of MC44603
The input voltage Vcc (pin 1) is monitored by a comparator with
hysteresis, enabling the circuit at 14.5V and disabling the
circuit below 7.5V. The error amplifier compares a voltage Vfb
(pin 14) related to the output voltage of the power supply, with
an internal 2.5V reference. The current sense comparator
compares the output of the error amplifier with the switch
current Isense (pin 7) of the power supply. The output of the
current sense comparator resets a latch, which is set every
cycle by the oscillator. The output stage is a totem pole,
capable of driving a MOSFET directly.
Start up sequence of P816
t1: Charging the capacitors at Vcc
C829 will be charged via R823 and R832, C833 and
C811 v i a R829. The output is switched off during t1.
t2: Charging of output capacitors
When the input voltage of the IC exceeds 14.5V, the circuit is
enabled and starts to produce output pulses. The current
consumption of the circuit increases to about 17mA, depending
on the external loads of the IC. At first, the capacitors at the Vcc
pin will discharge because the primary auxiliary voltage,
coming from winding 7-9 is below the Vcc voltage. At some
moment during t2, the primary auxiliary voltage reaches the
same level as Vcc. This primary auxiliary voltage now
determines the Vcc voltage.
t3: Regulation
The output voltage of the power supply is in regulation.
t4: Overload
When the output is shorted, the supply voltage of the circuit will
decrease and after some time drop below the lower threshold
voltage. At that moment, the output will be disabled and the
process of charging the Vcc capacitors starts again. If the
output is still shorted at the next t2 phase, the complete start-
and stop sequence will repeat. The power supply goes in a
hiccup mode.
16
Vref
REFERENCE
BLOCK
Iref
VOSC PROT
VOSC
OSCILLATOR
Vstby
STANDBY
(REDUCED FREQUENCY)
VS8 OUT
CURRENT
SENSE
CURRENT SENSE
INPUT
7
Iref
Vref
enable
SUPPLY
INITIALISATION BLOCK
1Set
LATCH C
=1
1Reset
THERMAL
SHUTDOWN
Iref
Dmax &
SOFT-START
CONTROL
SOFT-START
& DMAX
11
Figure 7-21
14.5V
Vcc
10V
7.5V
p.a.v.
0V
17mA
Icc
1mA
OUTPUT
Vo
0
t1
Regulation of P816
Figure 7-22 shows the most relevant signals during the
regulation phase of the power supply.
The oscillator voltage ramps up and down between V1 and V2.
The voltage at the current sense terminal is compared every
cycle with the output of the error amplifier Vcomp. The output
25
1
UVL01
VC
OUT
BUFFER
GND
Vref
Voc
OVER
VOLTAGE
OVER
PROTECT
UVL01
VOLTAGE
MANAGEMENT
Vref
CL 96532076_032.eps
290799
t2 t3
Figure 7-22 'Start-up sequence'
2
3
4
6
short
t4
CL 96532076_035.eps
290799