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PROGRAMMING INFORMATION
3-5.
8253-5 PIT PROGRAMMING
Two frequencies are input to the 8253-5 PIT (CLKO and CLK2
=
1.23 MHz;
CLK1
=
153.6 KHz).
The default (factory connected) and optional jumpers
for selecting the clock inputs to the three counters are listed in Table
2-5.
Jumpers allow counters 0 and 1 to provide real time interrupts to
the 8259A PIC.
Before programming the 8253-5 PIT, ascertain the input clock and output
function of each of the counters to be used.
These factors are
determined and established by the user during installation.
3-6.
MODE CONTROL WORD AND COUNT
Each counter must be initialized prior to its use.
The initialization
for each counter consists of two steps:
a.
A mode control word (Figure 3-1) is written to the control
register for each individual counter.
b.
A count number is loaded into each counter.
The count number is
in one or two 8-bit bytes as determined by the mode control word.
The mode control word (Figure 3-1) does the following:
a.
Selects counter to be loaded.
b.
Selects counter operating mode.
c.
Selects one of the following four counter read/load functions:
(1) Counter latch (for stable read operation).
(2) Read or load most-significant byte only.
(3) Read or load least-significant byte only.
(4)
Read or load least-significant byte first, then
most-significant byte.
d.
Sets counter for either binary or BCD count.
The mode control word and the count register bytes for any given counter
must be entered in the following sequence:
a.
Mode control word.
b.
Least-significant count register byte (it programmed by mode
control word).
c.
Most-significant count register byte (if programmed by mode
control word).
3-8
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