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8 Silk-Plot of the Board
8.1 Top Side
A
B
C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
RST
16
17
18
19
20
Power
21
Switch
Power
A
B
C
© Fujitsu Microelectronics Europe GmbH
SK-91F467D-208PFV V1.1
Silk-Plot of the Board
D
E
F
G
X4
X1
UART4
UART2
CAN0
CAN1
X10
X9
D
E
F
G
Figure 8-1: Board Layout (Top Side)
- 55 -
H
J
K
L
X8
X11
UART5
CAN2
INT1
ICU0
INT2
INT0
H
J
K
L
FMEMCU-UG-910014-10
M
N
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
M
N
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