Advanced Chipset Features; Dram Timing Selectable; Cas Latency Time - Intel 865G User Manual

BIOS SETUP

Advanced Chipset Features

This Setup menu controls the configuration of the chipset.

DRAM Timing Selectable

CAS Latency Time

Active to Precharge Delay
DRAM RAS# to CAS# Delay
DRAM RAS# Precharge
Memory Frequency For
System BIOS Cacheable
Video BIOS Cacheable
Memory Hole at 15M-16M
Delay Prior to Thermal
AGP Aperture Size (MB)
Init Display First
** On-Chip VGA Setting **
On-Chip VGA
On-Chip Frame Buffer Size
Boot Display
Panel Scaling
Panel Number
TV Standard
Video Connector
TV Format
DRAM Timing Selectable
This option refers to the method by which the DRAM timing is selected.
The default is By SPD.
CAS Latency Time
You can select CAS latency time in HCLKs of 2/2 or 3/3. The system
board designer should set the values in this field, depending on the
DRAM installed. Do not change the values in this field unless you
change specifications of the installed DRAM or the installed CPU. The
choices are 2 and 3.
Active to Precharge Delay
The default setting for the Active to Precharge Delay is 6.
DRAM RAS# to CAS# Delay
This option allows you to insert a delay between the RAS (Row Address
Strobe) and CAS (Column Address Strobe) signals. This delay occurs
when the SDRAM is written to, read from or refreshed. Reducing the
delay improves the performance of the SDRAM.
40
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
By SPD
2.5
6
3
3
Auto
Enabled
Disabled
Disabled
16 Min
128
Onboard/AGP
Enabled
8MB
CRT + LVDS
Auto
1024x768 LVDS
Off
Automatic
Auto
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