Breadboard Area; Ez-Extender Interfaces; Adc Hsc Interface - Analog Devices SHARC 82-000805-01 Manual

Analog devices inc. sharc ez-extender manual
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1 EZ-EXTENDER INTERFACES

This chapter relates how the extender interfaces with the compatible
boards. The information is presented in the following sections.
"ADC HSC Interface" on page 1-1
"Breadboard Area" on page 1-2

ADC HSC Interface

The SHARC EZ-Extender can connect to an analog-to-digital high-speed
converter (ADC HSC) evaluation board via the ADC HSC interface. The
ADC HSC interface consists of a 40-pin female header, which contains all
of the control and data signals necessary to transfer data between the par-
allel data access port (PDAP) of the processor and the HSC evaluation
board. Additionally, the extender provides a RJ-45 connector, which con-
tains all of the serial peripheral interconnect (SPI) signals necessary to
configure the control registers of capable high-speed converters. For a
block diagram of the ADC HSC interface, see
Before using the SHARC EZ-Extender, familiarize yourself with the docu-
mentation and schematics of the target board and the ADSP-21262
EZ-KIT Lite. For example, on the EZ-KIT Lite, it may be necessary to
disable other devices on the PDAP or disable the push buttons.
To configure the SHARC EZ-Extender to connect to an ADC HSC eval-
uation board, determine the source of the PDAP clock and the direction
of the general-purpose signals,
about possible clock settings, refer to
SHARC EZ-Extender Manual
Figure 2-1 on page
and
DAI_P15_GP1
"Direction/Clock Source Control
. To learn
DAI_P16_GP2
2-2.
1-1

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