Processor; L2 Cache; Main Memory - TMC TI6NBF+ User Manual

3.1 Processor

The TI6NBF+ motherboard is designed to take a Pentium II / Pentium !!!
processors running 233MHz ~ 500MHz using a Front Side Bus / Bus
Speed of 66MHz ~ 100MHz with its Slot 1 processor connector.

3.2 L2 Cache

The L2 cache is integrated in the Pentium II processor. The private L2
cache bus is not connected to package pins, rather its signals are routed
between the two cavities using standard package techniques.

3.3 Main Memory

The TI6NBF+ motherboard supports 32MB or 64MB SDRAM on board
and three 168-pin DIMM (Dual In-line Memory Module) sockets.
DIMM modules can be 8MB, 16MB, 32MB, 64MB and 128MB in
SDRAM DRAM. In populating the DIMM sockets, DIMM1, DIMM2,
and DIMM3 bank can be populated first. Refer to the following table
showing examples on how to configure the memory.
NOTE: Use SDRAM modules with PC100 specification when running
100MHz CPU bus speed. With 66MHz CPU bus speed, SDRAM
modules with PC66 or PC100 specification can be used.
168-pin DIMM (3.3V) SDRAM
Onboard
DIMM3
SDRAM
32MB -----
32MB 32MB
32MB 32MB
32MB 32MB
32MB 64MB
32MB 64MB
32MB 64MB
32MB 128MB
32MB 128MB
32MB 128MB
32MB 128MB
32MB 128MB
32MB 128MB
32MB 128MB
32MB 128MB
TI6NBF+ Pentium II /III ATX Motherboard User's Manual
Chapter 3 Hardware Description
DIMM2 DIMM1 Total Memory
----- -----
----- -----
32MB -----
32MB 32MB
----- -----
32MB -----
32MB 32MB
----- -----
32MB -----
32MB 32MB
64MB -----
64MB 32MB
64MB 64MB
128MB 64MB
128MB 128MB
32MB
64MB
96MB
128MB
96MB
128MB
160MB
160MB
196MB
224MB
228MB
256MB
288MB
352MB
416MB
7