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Chapter 6. FORWARD ERROR
6.1
Introduction
The Forward Error Correction (FEC) method utilized by the CDD-880 Multi Receiver Router is a
completely new family of short-block Low Density Parity Check (LDPC) codes with very low
latency called VersaFEC
Comtech EF Data and CEFD sister division Comtech AHA Corp. (the VersaFEC name is a
trademark registered to Comtech AHA), VersaFEC is ideal for lower data rates that demand the
shortest possible latency.
6.2
VersaFEC (Short-block LDPC)
While LDPC coding represents a very significant development in the area of FEC and the
performance of LDPC is exceptional in terms of coding gain, its higher latency is considered
disadvantageous in some applications.
Since the introduction of Comtech's LDPC, considerable research has been carried out to find
ways to reduce the block size of LDPC (and hence its latency) while preserving the coding gain
performance very close to the Shannon bound.
The VersaFEC code set was developed with two distinct purposes:
1) To provide an expanded choice of combinations of modulation and coding that significantly
reduces latency without compromising coding gain performance.
2) To provide combinations of modulation and coding (ModCods) that are not only suitable for
Constant Coding and Modulation (CCM) applications, but are also the basis for a patent-
pending Adaptive Coding and Modulation (ACM) system (ACM will be available in future
releases of the CDD-880).
VersaFEC represents the best FEC technology currently available, and is offered with a sufficient
range of code rates and modulation types that link performance can be optimized under almost
any conditions. The performance of the VersaFEC codes compared with the Shannon bound is shown
in Figure 6-1.
Note that SNR is used in place of Eb/No – a convention for comparing ACM ModCods. SNR is
defined as Eb/No + 10
®
. A patents-pending technology wholly owned and developed by
(Spectral Efficiency).
log
6–1
CORRECTION
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