Ic Block Diagram & Description - Sanyo DC-M3 Service Manual

IC BLOCK DIAGRAM & DESCRIPTION
IC101 LA9241ML (Servo Signal Processor)
Vcc1 LDS LDD BH1 PH1
64 63 62 61 60
APC
RF DET
FIN2 1
VCA
2
FIN1
I/V
3
E
BAL VCA
4
F
5
TB
TE
TE- 6
7
TE
8
TESI
T.SERVO & T.LOGICK
9
SCI
10
TH
11
TA
TD- 12
F.SERVO & F.LOGICK
13
TD
14
JP
TO 15
FD 16
17 18 19
FD- FA FA-
No. Pin Name I/O
1 FIN2 I Connection Pin for Photo Diode of Pickup.
2 FIN1 I FIN2 + FIN1 = RF, FIN2 - FIN1 = FE
3 E I Connection Pin for Photo Diode of Pickup.
4 F I E - F = TE
5 TB I Input Pin for DC ingredient of TE Signal.
6 TE- I Connection Pin for Gain Setting Resistor of TE
Signal to TE Signal Pin.
7 TE O Output Pin for Tracking Error Signal.
8 TESI I Input Pin for Track Error Sense Comparator.
TE Signal through Band Pass, and Inputted.
9 SCI I Input Pin for Shock Detection.
10 TH I Connection Pin for Time Constant Setting of
Tracking Gain.
11 TA O Output Pin for TA Amplifier.
12 TD- I Connection Pin for Constant Tracking Phase
Compensation, Consist of between TD and VR.
13 TD I Connection Pin for Constant of Tracking Phase
Compensation.
14 JP I Connection Pin for Amplitude Setting of Tracking
Jump (Kick Pulse) Signal.
15 TO O Output Pin for Tracking Control Signal.
16 FD O Output Pin for Focusing Control Signal.
17 FD- I Connection Pin for Constant of Focusing Phase
Compensation, Consist of between FD and FA.
18 FA+ I Connection Pin for Constant of Focusing Phase
Compensation, Consist of between FD- and FA-.
19 FA- I Connection Pin for Constant of Focusing Phase
Compensation, Consist of between FA and FE.
20 FE O Output Pin for Focusing Error Signal.
21 FE- I Connection Pin for Gain Setting Resistor of FE
Signal to FE Signal Pin.
22 AGND - Ground for Analog Signal.
LF2 VR REF1 Vcc2 FSS DRF CE DAT CL CLK DEF
59 58 57 56 55 54 53 52 51 50 49
REF
˚-com
INTER FACE
SLC
RF Amp
SPINDLE SERVO
SLED SERVO
20 21 22 23 24 25 26 27 28 29 30 31
FE FE- AGND SP SPI SPG SP- SPD SLEQ SLD SL- SL+
Function
No. Pin Name I/O
23 SP O Output Pin for Single End of Input Signal of the
24 SPI I
48 NC
25 SPG I
TBC
47
26 SP- I
46 FSC
DGND
45
27 SPD O Output Pin for Spindle Control Signal.
SLI
44
28 SLEQ I
43 SLC
42 RFS-
29 SLD O Output Pin for Sled Control Signal.
30 SL- I
41 RFSM
31 SL+ I
32 JP- I
40 CV+
33 JP+ I
39 CV-
34 TGL I
38 SLOF
37 HFL
35 TOFF I
TES
36
35 TOFF
36 TES O Output Pin for Track Error Sense Signal to Digital
34 TGL
37 HFL I
33 JP+
38 SLOF I
39 CV- I
40 CV+ I
41 RFSM O Output Pin for RF Signal.
32
42 RFS- I
JP-
43 SLC O Slice Level Control Signal is Output Pin.
44 SLI I
45 DGND - Ground for Digital Signal.
46 FSC O Output Pin for Focus Search Smooth Condenser
47 TBC O Connection Pin for Variable Range Setting of
48 NC - No Connect
49 DEF O Output Pin for Defect Detection of Disc.
50 CLK I
51 CL I
52 DAT I
53 CE I
54 DRF O Output Pin for Detect of RF Level.
55 FSS I
56 VCC2 - VCC for Servo and Digital Root.
57 REFI I
58 VR O Output Pin for Reference Voltage.
59 LF2 I
60 PH1 I
61 BH1 I
62 LDD O Output Pin of APC (Automatic Power Control) Circuit.
63 LDS I
64 VCC1 I
- 15 -
Function
CV+, CV- Pin.
Input Pin for Spindle Amplifier.
Connection Pin for Gain Setting Resistor, when
Spindle 12 cm Mode.
Connection Pin for Constant of Spindle Phase
Compensation with SPD Pin.
Connection Pin for Constant of Sled Phase
Compensation.
Input Pin for Sled Signal from Micro Processor.
Input Pin for Tracking Jump Signal from Digital
Signal Processor.
Input Pin for Tracking Gain Control Signal from
Digital Signal Processor. TGL = H : Gain Low
Input Pin for Tracking Off Control Signal from Digital
Signal Processor. TOFF = H : OFF
Signal Processor.
High Frequency Level Signal Use Detection
Main-Beam Position is on the pit or mirror.
Input Pin for Sled Servo Off Control.
Input Pin for Constant Linear Velocity Error
Signal from Digital Signal Processor.
Connection Pin for Gain Setting of RF and
Constant Setting of 3T Compensation of the
EFM Signal with RFSM Pin.
It Control Level of Data-Slice by Digital Signal
Processor of the RF Waveform.
Input Pin for Level Control of Data-Slice by
Digital Signal Processor.
EF Balance.
Input Pin for Reference Clock Pulse.
(4.23 MHz of Digital Signal Processor)
Input Pin of Clock Pulse for Command from
Micro Processor.
Input Pin of Data for Command from Micro
Processor.
Input Pin of Chip Enable for Command from Micro
Processor.
Select Pin for Focus Search Mode
Bus Control Connection Pin for Reference Voltage.
Connection Pin for Time Constant Setting of
Detect Detection of the Disc.
Capacitor Connection Pin for Peak-hold of RF Signal.
Capacitor Connection Pin for Bottom-hold of
RF Signal.
Input Pin of APC (Automatic Power Control) Circuit.
VCC for RF Root.