Sanyo DC-M3 Service Manual page 40

IC BLOCK DIAGRAM & DESCRIPTION
IC241 LC72121M (PLL Synthesizer)
VREF
1
Vdda
3
REFERENCE
VOLTAGE
4
Vssa
57kHz
BPF
ANTIALIASING
(SCF)
2
MPXIN
FILTER
DO 20
R A M
CL 21
(24 BLOCK DATA)
C C B
DI 22
CE 23
T1 7
MEMORY CONTROL
T2 8 TEST
T3~T7 9~11,16,17
IC251 LC72722 (RDS Signal Processor)
Vdda
3
Vssa 4
2
MPXIN
DO 20
CL 21
DI 22
CE 23
T1
7
T2 8
T3~T7 9~11,16,17
IC415 LA2615 (Surround Signal Processor)
GCR GLR POG
P16 P15 P14
ANALOG
SURROUND
P1 P2 P3
CONT1 CONT2 CONT3
FLOUT CIN
5 6
PLL
(57kHz)
VREF
SMOOTHING
FILTER
ERROR CORRECTION
SYNC/EC CONTROLLER
(SOFT DECISION)
CLK(4.332MHz)
SYNC
DETECT-1
OSC / DIVIDER
13 12
XOUT
XIN
VREF
1
REFERENCE
VOLTAGE
57kHz
BPF
ANTIALIASING
(SCF)
FILTER
R A M
(24 BLOCK DATA)
C C B
MEMORY CONTROL
TEST
LPFD NC VCC L-OUT
P13 P12 P11 P10
Vcc
A
SW
B
ATT LEVEL
ON/OFF
VREF B
SW
A
P4 P5 P6 P7
GND HFFC VREF L-IN
IC487 TDA7265
(25 + 25W Stereo Amplifier with Mute & ST-by)
CLOCK
14 Vddd
MUTE/
RECOVERY
(1187.5Hz)
Vssd
15
DATA
19 RDS-ID
DECODER
18 SYNC
SYR
24
SYNC
DETECT-2
FLOUT CIN
5 6
PLL
(57kHz)
VREF
SMOOTHING
FILTER
ERROR CORRECTION
(SOFT DECISION)
CLK(4.332MHz)
OSC / DIVIDER
12
13
XOUT
XIN
IC451 LC75342M
R-OUT
P9
30 28
29
1 2 3
P8
R-IN
- 18 -
+Vs
3
5
ST-BY
IN (L)
7
9
GND
IN (R) 11
1 6
-Vs
CLOCK
14
RECOVERY
(1187.5Hz)
15
DATA
19
DECODER
18
SYNC/EC CONTROLLER
24
SYNC
SYNC
DETECT-1 DETECT-2
(2-ch Stereo Audio Power Amplifier)
27 26 25 24 23 22 21
4 5 6 8 10
7 9
4 OUT (L)
8
IN- (L)
10
IN- (R)
2 OUT (R)
Vddd
Vssd
RDS-ID
SYNC
SYR
20 19 18 16
17
11 12 13 14
15