Advantech MicroTCA UTCA-5503 User Manual
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Advantech MicroTCA UTCA-5503 User Manual

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User Manual
UTCA-5503
MicroTCA™ Carrier Hub

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Summary of Contents for Advantech MicroTCA UTCA-5503

  • Page 1 User Manual UTCA-5503 MicroTCA™ Carrier Hub...
  • Page 2 No part of this manual may be reproduced, copied, translated or transmitted in any form or by any means without the prior written permission of Advantech Co., Ltd. Information provided in this manual is intended to be accurate and reliable. How- ever, Advantech Co., Ltd.

  • Page 3: Declaration Of Conformity

    Class I, Division 2, Groups A, B, C and D indoor hazards. Technical Support and Assistance Visit the Advantech web site at www.advantech.com/support where you can find the latest information about the product. Contact your distributor, sales representative, or Advantech's customer service center for technical support if you need additional assistance.

  • Page 4: Document Feedback

    Warnings, Cautions and Notes Warning! Warnings indicate conditions, which if not observed, can cause personal injury! Caution! Cautions are included to help you avoid damaging hardware or losing data. e.g. There is a danger of a new battery exploding if it is incorrectly installed. Do not attempt to recharge, force open, or heat the battery.

  • Page 5: Safety Instructions

    The sound pressure level at the operator's position according to IEC 704-1:1982 is no more than 70 dB (A). DISCLAIMER: This set of instructions is given according to IEC 704-1. Advantech disclaims all responsibility for the accuracy of any statements contained herein.
  • Page 6 Safety Precaution - Static Electricity Follow these simple precautions to protect yourself from harm and the products from damage. To avoid electrical shock, always disconnect the power from your PC chassis before you work on it. Don't touch any components on the CPU card or other cards while the PC is on.
  • Page 7 Glossary Advanced Mezzanine Card Central Processing Unit Cooling Unit FPGA Field-Programmable Gate Array Field Replaceable Unit Gigabit Ethernet Inter-Integrated Circuit, 2-wire serial bus IPMB Intelligent Platform Management Bus, I2C type IPMI Intelligent Platform Management Interface Mega-bit MicroTCA Carrier Hub MCMC MicroTCA Carrier Management Controller Mgmt Management...
  • Page 8 UTCA-5503 User Manual viii...

  • Page 9: Table Of Contents

    Contents Chapter Board Specification ......1 Technical Data ..................2 Table 1.1: Advantech UTCA-5503 MCH Technical Data .... 2 Advantech UTCA-5503 Features .............. 3 1.2.1 MCMC................... 3 Table 1.2: H8S I2C Bus Assignment ........... 3 1.2.2 FPGA .................... 4 1.2.3 RTC....................4 1.2.4...
  • Page 10 Chapter Operations ......... 21 Power the MCH..................22 4.1.1 Preparation ................. 22 4.1.2 Insertion ..................22 4.1.3 Extraction..................22 Use Mini-USB Debug Interface............... 22 4.2.1 Preparation ................. 22 Figure 4.1 USB-to-UART Bridge Controller Shown on Windows’ Device Manager ............23 Figure 4.2 cp2101 converter detected when Linux driver installed successfully ..............

  • Page 11: Supported By The Carrier Manager

    Appendix C IPMI/PICMG Command Subset Supported by the Carrier Manager ..47 IPMI/PICMG Command Subset Supported by the Carrier Manager..48 Table C.1: IPMI/PICMG Command Subset Supported by the Car- rier Manager ............. 48 Appendix D IPMI/PICMG Command Subset Supported by the uShM ....51 IPMI/PICMG Command Subset Supported by the uShM .......
  • Page 12 UTCA-5503 User Manual...

  • Page 13: Chapter 1 Board Specification

    Chapter Board Specification...

  • Page 14: Technical Data

    Technical Data Table 1.1: Advantech UTCA-5503 MCH Technical Data MCH module Standard MCH module (PCB Level 1), single width, full size Application/Security Optional on PCB Level 3 Processor COM1 exposed to front panel as USB Slave interface through Serial Interface onboard USB/Serial converter, USB1.1 compliant...

  • Page 15: Advantech Utca-5503 Features

    H8S Microprocessor Renesas Technology’s HD64F2166 (referenced hereafter as the H8S) is used as the micro controller for the MCMC implementation on Advantech’s MCH (aMCH). This micro controller contains a Renesas’ H8S/2000 CPU as its core architecture, in addi- tion to peripheral functions. The H8S is a highly integrated micro controller that has on-chip Flash and SRAM memories.

  • Page 16: Fpga

    1.2.1.3 MCH to MCH Communication At the moment of this manual creation, MCH redundancy is not supported by PPS. Consequently, to avoid potential damage, two MCH modules should not be used in one system until a firmware update with the PPS MCH redundancy feature is made available.

  • Page 17: Figure 1.1 Gbe Architecture

    Figure 1.1 GbE architecture The PHY’s may be connected to a CPU or Layer 3 switch on PCB3 instead of a con- nection to the switch on PCB Level 1 (or PCB1). 1.2.4.1 Gigabit Ethernet Management and E-Keying The basic UTCA-5503 supports unmanaged GbE operation only. Any managed GbE switch operation can only be supported by a CPU on PCB3.

  • Page 18: Figure 1.2 Gbe Switch Management And E-Keying

    Figure 1.2 GbE Switch Management and E-keying 1.2.4.2 Gigabit Ethernet PHYs Two Marvell 88E1111 PHY’s are used. These PHY’s support two different MAC inter- faces: SGMII and RGMII. The SGMII interface is connected to the GbE switch and the RGMII interface will be connected to PCB3. Either selection of the two interfaces can be configured manually though IPMI command by the user when PCB3 is detected.

  • Page 19: Usb Slave Interface

    1.2.5 USB Slave Interface A full speed USB1.1 compliant slave port is implemented on a standard USB Type mini-B connector on the front panel. The implementation uses a standard USB host to a serial port converter chip which is cross-connected to the FPGA that implements a MUX to either connect the UART port to the H8S Serial Debug Interface, the H8S Command Line Interface or to a CPU on PCB3.
  • Page 20 UTCA-5503 User Manual...

  • Page 21: Chapter 2 Applications And Overview

    Chapter Applications and Overview...

  • Page 22: Figure 2.1 Utca System Elements

    The MCH consists of a stack of 4 PCB layers, labeled as PCB1 to PCB4 as shown in Figure 2.2. Figure 2.2 MCH PCB Naming Conventions UTCA-5503, implemented on PCB1 of Advantech’s MCH, contains the basic features that every MCH must support as well as interface connections to PCB2 to PCB4. the management controller called the MCMC the common options switch fabric All other PCBs except for PCB1 are optional for an MCH.

  • Page 23: System Management

    PCB2 carries the system clock logic and may also contain switching logic for fabric B which is normally used for SATA/SAS functionality on AMC modules. SATA is nor- mally used for direct connection of a processor AMC and a SATA drive. Therefore, PCB2 with SAS/SATA functionality may just be implemented on custom request.

  • Page 24: Clocks

    Clocks A MCH may support clock distribution for up to 3 clocks per module. Each AMC slot supports two clock inputs (MCH to AMC), CLK1/3, and one clock output (AMC to MCH), CLK2. All clocks use LVDS compliant drivers/receivers. UTCA-5503 supports two different clock architectures, redundant and non-redundant as shown below.

  • Page 25: Common Options

    (Star topology). Receive/transmit cross- over wiring is implemented on the uTCA backplane. Systems utilizing two (redun- dant) MCH’s may be used to implement Dual Star topologies. The Advantech MCH supports a Gigabit Ethernet interface for the common options utilizing a 1000Bx (SERDES) interface to the backplane.
  • Page 26 UTCA-5503 User Manual...

  • Page 27: Chapter 3 Mezzanine Module Options

    Chapter Mezzanine Module Options...

  • Page 28: Pcb Levels And Stacking

    As a modularized MCH base board (PCB1), UTCA-5503 can be completed with addi- tional functionalities by integrating with mezzanine PCB’s such as PCB2, PCB3, and PCB4. These PCB’s are mounted like a stack and share one common face plate. This chapter will delve into more detail about the integration of these mezzanine PCB’s with UTCA-5503.

  • Page 29: Clock Module And Clock Io/Alarm Module (Pcb2)

    Clock Module and Clock IO/Alarm Module (PCB2) PCB2 can consist of two mezzanines - a Clock IO/Alarm Module and a Clock Module (see Figure 3.2). The Clock IO/Alarm Module contains the interfaces or ports for multi-carrier/shelf clock distribution and synchronization (daisy chain cabling sup- ported) as well as external reference clock receptions such as GPS derived clocks, BITS clocks, or other general purpose clocks.

  • Page 30: Additional Fabric Extension Module (Pcb4)

    Additional Fabric Extension Module (PCB4) PCB4 also serves as a fabric extension module of PCB1. However, the actual dimen- sions and limitations of the module will heavily depend on the PCB3 implementation. So, PCB3 and PCB4 should always be considered as a common set. Front Panel Connectors and Indicators Figure 3.4 UTCA-5503 Front Panel 3.6.1...

  • Page 31: Lan1

    3.6.5 LAN1 A low profile RJ45 connector with integrated LED’s and transformer is used for LAN1. It can be used for 10/100/1000Base-T uplink or 10/100Base-T management LAN connection. 3.6.6 LAN2 By default, LAN2 also uses a low profile RJ45 connector with integrated LED’s and transformer.
  • Page 32 UTCA-5503 User Manual...

  • Page 33: Operations

    Chapter Operations...

  • Page 34: Power The Mch

    Power the MCH 4.1.1 Preparation UTCA-5503 requires an uTCA chassis with uTCA power supply for operation. 4.1.2 Insertion Insert UTCA-5503 into a MCH slot (PCB1) on the backplane of an uTCA chassis. The chassis can be powered or un-powered as the MCH supports hot swap. When the system is powered and the handle switch is closed, the blue LED (LED0) will start to give long blinks, and the FRU LED2 starts blinking green (FW is active) The blue LED will turn off at the same time.

  • Page 35: Figure 4.1 Usb-To-Uart Bridge Controller Shown On Windows Device Manager

    Microsoft Windows After installing the driver and connecting the MCH Mini-USB jack, the CP210x USB- to-UART Bridge Controller can be found in the Windows’ Device Manager. Figure 4.1 USB-to-UART Bridge Controller Shown on Windows’ Device Manager Linux “dmesg | grep cp21” will show if the driver has been loaded successfully. It is included in most of the standard 2.6 kernel Linux distributions.

  • Page 36: Usage

    <_>: BMR-H8S Firmware (v1.0.0), MCMC edition. <_>: Pigeon Point Systems (c) Copyright 2004-2007. <_>: Advantech aMCH (c) 2007 by Advantech <_>: Build date: Apr 14 2008 17:08:31 <_>: Reset type: hard, reset cause: power failure <_>: Operating mode: normal <_>: E-Keying links disabled...
  • Page 37 <_>: found site: AMC # 6 <_>: found site: AMC # 7 <_>: found site: AMC # 8 <_>: found site: AMC # 9 <_>: found site: MCH # 2 <_>: found site: PM # 2 <_>: found site: CU # 2 <_>: Carrier Power Policy record was found <_>:...
  • Page 38 <_>: Actual Shelf Manager IP address is 172.21.35.102 <_>: Actual gateway IP address is 172.21.35.102 <_>: Actual subnetwork mask is 255.255.255.0 <_>: Shelf Info record was found <_>: reading and parsing MCMC FRU Info <_>: found an AMC Point-to-Point Connectivity record <_>: found a Module Current Requirements record <_>:...
  • Page 39 <_>: found 1 working PM(s) <_>: Inserted modules: <_>: CU # 1 <_>: PM # 1 <_>: MCH # 1 <_>: Current power distribution: <_>: PM # 1 feeds as primary (used 4.0A): <_>: MCH # 1 (M,P,E) <_>: CU # 1 (M,P,E) <_>: Event from CM Sensor #0 "Hot Swap CM"...

  • Page 40: Use Command Line Interface

    Pigeon Point MicroTCA Shelf Manager ver. 1.0.0 Pigeon Point is a trademark of Pigeon Point Systems. Copyright (c) 2002-2007 Pigeon Point Systems Advantech aMCH (c) 2007 by Advantech Build date/time: Apr 14 2008 17:08:23 All rights reserved cli> help...

  • Page 41: Lan

    The MCH has 2 front panel RJ45 jacks (see Figure 3.4). LAN1 is 10/100/1000Mb capable when it is routed to the GbE switches. However, it is 10/100 Mb capable when routed to the management LAN controller. LAN2 is 10/100/1000Mb capable. 4.4.1 Preparation To use the GbE capability of LAN1, a GbE capable counter-part such as GbE NIC or...

  • Page 42: Mcmc/Mch Management Subsystem

    MCMC/MCH Management Subsystem The MCMC/MCH Management Subsystem is a firmware component that implements the MicroTCA functionality related to exposing the MCMC and MCH resources to the Shelf/System Managers. This subsystem is responsible for handling the IPMI/PICMG commands related to the MCMC/MCH resources, implementing MCMC/MCH sensor devices and exposing MCMC/MCH FRU devices.

  • Page 43: Rmcp Module

    4.6.1 RMCP Module UTCA-5503 provides access to the uSHM through the IPMI-defined RMCP protocol (refer to section 12 of the IPMI Specification). This IP-based interface allows external RMCP-capable System Management Tools (e.g. OpenIPMI or OpenHPI with ipmidi- rect Plugin) to interact with the MCH. The uShM’s RMCP interface supports message bridging, therefore it is possible to communicate with the CM/MCMC as well as FRUs located on the IPMB-0 or IPMB-L buses through this connection.
  • Page 44 UTCA-5503 User Manual...

  • Page 45: Firmware Upgrades

    Chapter Firmware Upgrades...

  • Page 46: Mch Field Updateable Components

    An external flash holds two FW copies, an active as well as a backup one, providing roll back features in case of failed FW upgrades. Advantech will provide bug fixes, updates and new features through FW application images.

  • Page 47: Mch Hpm.1 Upgrade With Ipmitool

    Note! The serial download requires a modified version of ipmitool, available as source and binary executable on the Advantech web site. As all field updateable components are realized as HPM.1 compliant components, the upgrade mechanism is identical for any of them. For example the command for a...

  • Page 48: Mch Boot Process

    MCH Boot Process The MCMC boot process includes the following steps: The boot loader performs an early Power-On Self Test (POST) of the hardware. If the FPGA POST fails, the boot loader will try to automatically recover the FPGA from a failsafe configuration stored in the flash. The Boot Loader calculates the checksum of the MCMC firmware image.

  • Page 49: Overview Of Supported Features And Known Limitations

    Chapter Overview of Supported Features and Known Limitations...

  • Page 50: Table 6.1: Current Supported And Unsupported Features

    Below is a list of UTCA-5503’s current supported and unsupported features. MCMC firmware version:1.0.0, FPGA firmware version: 2.00 Table 6.1: Current supported and unsupported features Feature Supported Unsupported REMARK Carrier Manager basic features (FRU access, message bridging, √ sensor events and alerts, e-Key- ing) Shelf Manager (uShM) basic fea- tures (AMC detection, activation,...

  • Page 51: Mch Pin List, Connector

    Appendix MCH Pin List, Connector 1...

  • Page 52: Mch Pin List, Connector 1

    MCH Pin List, Connector 1 Table A.1: MCH Pin List, Connector 1 Pin No. Signal Pin No. Signal IPMBL-SDA-12 PS0# IPMBL-SCL-12 XOVER2- IPMBL-SDA-11 XOVER2+ IPMBL-SCL-11 XOVER1- IPMBL-SDA-10 XOVER1+ IPMBL-SCL-10 XOVER0- IPMBL-SDA-9 XOVER0+ IPMBL-SCL-9 IPMBL-SDA-8 SDL_L IPMBL-SCL-8 RxFA-12- IPMBL-SDA-7 RxFA-12+ IPMBL-SCL-7 TxFA-12- IPMBL-SDA-6 TxFA-12+...
  • Page 53 Table A.1: MCH Pin List, Connector 1 I2C_SDA ENABLE# I2C_SCL RxFA-7- RSVD RxFA-7+ TMREQ# TxFA-7- RxFA-8- TxFA-7+ RxFA-8+ RxFA-5- TxFA-8- RxFA-5+ TxFA-8+ TxFA-5- RxFA-6- TxFA-5+ RxFA-6+ TxFA-6- TxFA-6+ RxFA-3- RxFA-4- RxFA-3+ RxFA-4+ TxFA-3- TxFA-4- TxFA-3+ TxFA-4+ RxFA-2- RxFA-2+ RxFUA- TxFA-2- RxFUA+ TxFA-2+ TxFUA-...
  • Page 54 UTCA-5503 User Manual...

  • Page 55: Ipmi/Picmg Command Subset

    Appendix IPMI/PICMG Command Subset Supported by the MCMC...

  • Page 56: Ipmi/Picmg Command Subset Supported By The Mcmc

    IPMI/PICMG Command Subset Supported by the MCMC Table B.1: IPMI/PICMG Command Subset Supported by the MCMC IPMI/ATCA/ Carrier Command AMC/MTCA NetFn Manager Req Spec IPM Device “Global” Commands Get Device ID 17.1 Mandatory Cold Reset 17.2 Optional Warm reset 17.3 Optional Get Self Test Results 17.4...
  • Page 57 Table B.1: IPMI/PICMG Command Subset Supported by the MCMC Reserve Device SDR Repository 29.4 Mandatory Set Sensor Hysteresis 29.6 Optional Get Sensor Hysteresis 29.7 Optional Set Sensor Threshold 29.8 Optional Get Sensor Threshold 29.9 Optional Set Sensor Event Enable 29.10 Optional Get Sensor Event Enable 29.11...
  • Page 58 UTCA-5503 User Manual...

  • Page 59: Ipmi/Picmg Command Subset

    Appendix IPMI/PICMG Command Subset Supported by the Carrier Manager...

  • Page 60: Ipmi/Picmg Command Subset Supported By The Carrier Manager

    IPMI/PICMG Command Subset Supported by the Carrier Manager Table C.1: IPMI/PICMG Command Subset Supported by the Carrier Manager IPMI/PICMG/ Carrier Command AMC/MTCA NetFn Manager Req Spec IPM Device “Global” Commands Get Device ID 17.1 Mandatory Broadcast “Get Device ID” 17.9 Mandatory Event Commands Platform Event...
  • Page 61 Table C.1: IPMI/PICMG Command Subset Supported by the Carrier Manager Power Channel Control 3-28 PICMG Mandatory Get Power Channel Status 3-29 PICMG Mandatory PM Reset 3-31 PICMG Mandatory Get PM Status 3-32 PICMG Mandatory PM Heartbeat 3-33 PICMG Mandatory Get Telco Alarm Capability 3-40 PICMG Mandatory...
  • Page 62 UTCA-5503 User Manual...

  • Page 63: Ipmi/Picmg Command Subset

    Appendix IPMI/PICMG Command Subset Supported by the uShM...

  • Page 64: Ipmi/Picmg Command Subset Supported By The Ushm

    IPMI/PICMG Command Subset Supported by the uShM Table D.1: IPMI/PICMG Command Subset Supported by the uShM Command IPMI Spec NetFn MTCA.0 Req IPM Device “Global” Commands Get Device ID 17.1 Mandatory Cold Reset 17.2 Optional Warm Reset 17.3 Optional Get Self Test Results 17.4 Mandatory Get Device GUID...
  • Page 65 Table D.1: IPMI/PICMG Command Subset Supported by the uShM Set Sensor Event Enable 29.10 Optional Get Sensor Event Enable 29.11 Optional Get Sensor Event Status 29.13 Optional Get Sensor Reading 29.14 Mandatory FRU Device Commands Get FRU Inventory Area Info 28.1 Storage Mandatory...
  • Page 66 No part of this publication may be reproduced in any form or by any means, electronic, photocopying, recording or otherwise, without prior written permis- sion of the publisher. All brand and product names are trademarks or registered trademarks of their respective companies. © Advantech Co., Ltd. 2008...

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