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P9212 Maintenance Manual page 269

IPL2 . . . . . . . . . . . . . .
LATSTB
LATPOL
LCD . . . . . . . . . . . . . .
LED . . . . . . . . . . . . . .
LRM . . . . . . . . . . . . . .
MA0–8
MPU . . . . . . . . . . . . . .
MUX
N . . . . . . . . . . . . . . . .
N_ . . . . . . . . . . . . . . .
NACK
NBAS
NBG . . . . . . . . . . . . . .
NBGACK
NBLDS
NBR . . . . . . . . . . . . . .
NBUDS
NBUFCLR
NBRDBWR
NBRKRTRP
NC, N/C
NCASOL
NCASOU
NCIACK
NCNTCLR
NCTC0–2
NCTRO
NDAV
NDMACS
NDSTBOUT
NDTEXD
NEMDIS
NENABLE
NEEPROM
NEPROM0
NEPROM1
Mnemonics
Interrupt Level 2
. . . . . . . . . . . Latch Strobe
. . . . . . . . . . Latch Strobe Polarity
Liquid Crystal Display
Light Emitting Diode
Left Ribbon Motor
. . . . . . . . . . . . Memory Address 0 to 8
Magnetic Pick Up
. . . . . . . . . . . . . Multiplex
Negative True
Negative True
. . . . . . . . . . . . Acknowledge
. . . . . . . . . . . . . Address Strobe
Bus Grant
. . . . . . . . . Bus Grant Acknowledge
. . . . . . . . . . . Lower Data Strobe
Bus Request
. . . . . . . . . . . Upper Data Strobe
. . . . . . . . . Buffer Clear
. . . . . . . . Read or Write
. . . . . . . Breaker Trip
. . . . . . . . . . . Not Connected
. . . . . . . . . . Column Address Strobe Lower
. . . . . . . . . . Column Address Strobe Upper
. . . . . . . . . . Interrupt Acknowledge
. . . . . . . . . Dot Count Clear
. . . . . . . . . . Counter/Timer Chip 0–2 Select
. . . . . . . . . . . Dot Count Read
. . . . . . . . . . . . Data Available
. . . . . . . . . DMA Chip Select (68B44)
. . . . . . . Data Strobe Out
. . . . . . . . . . Data Transfer Extend
Memory Disable (Vcc ≤ 3.4V)
. . . . . . . . . .
. . . . . . . . . Enable Front Panel
. . . . . . . . EEPROM Device Select
. . . . . . . . . EPROM 0 Device Select
. . . . . . . . . EPROM 1 Device Select
B–3