Lvds Interface (Sis302Lv - Clevo D400S Service Manual

Schematic Diagrams

LVDS Interface (SiS302LV)

Y
C
+3VS
[5]
Sheet 11 of 35
LVDS interface
[5]
(Sis302LV)
[9,13,14,20,22,24]
[11]
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B - 12 LVDS Interface (SiS302LV) (71-D4000-D04)
C248 33PF(R)
COMPOSITE R211 0(R) Z1301
L46
R212 0 1 2
FCM1608K-121T07
JTV1
L47
1 2 4
2.7UH
D22 D23 2
DA204U(R) DA204U(R) R213 C250 33PF(R) R202 C261 C249
75
C262 C251 75 330PF 330PF
330PF 330PF
SVIDEO CON
PIN(GND1,GND2)=GND
VAD[0..11]
VAD[0..11]
VAD0
VAD1
VAD2
VAD3
VAD4
VAD5
VAD6 VAGCLK
[5] VAGCLK
VAD7
[5] VAHSYNC
VAD8
[5] VAVSYNC
VAD9
VAD10
VAD11
VBD[0..11]
VBD[0..11]
VBD0
VBD1
VBD2
VBD3
VBD4
VBD5
VBD6
VBD7
VBD8
VBD9
VBD10
VBD11
DVDD
103
DVDD/DVDD4
VADE
104
[5] VADE DE2/VADE
DGND
105
FLD/STL2/DVSS4
106
T AS/RESERVED
VBCAD
107
[5] VBCAD
SPD/VBCAD
VBHCLK
108
[5] VBHCLK
SPC/VBHCLK
DGND
109
HIN/DVSS5
DVDD 110
VIN/DVDD5
VREF2 111
VREF2/OVDD
112
T SDD/GPIOA(GPI)
113
T SDC/GPIOB(GPI)
114
T DD1/GPIOC(GPI)
115
T DC1/GPIOD(GPI)
LDDCDATA
R19 100 116
T DD2/LDDCDATA
LDDCCLK
R20 100 117
T DC2/LDDCCLK
V5V
118
V5V/V5V
119
T HOUT/V2HSYNC
120
T VOUT/V2VSYNC
121
T INTA# HPD/LCDSENSE
122
[9,13] INTA# HPINT*/INTA#
PCIRST#
123
PCIRST# GPIO[0]/EXTRSTN
124
T GPIO[1]/PFTEST1
125
T GPIO[2]/PFTEST2
126
T GPIO[3]/PFTESTO
ENAVDD
127
[11] ENAVDD
ENAVDD/GPIOG(GP
ENABKL 128
[11] ENABKL
ENABKL/GPIOH(GP
LDC0-
LDC0-
LDC0+
LDC0+
LDC1-
LDC1-
LDC1+
LDC1+
LDC2-
LDC2-
LDC2+
LDC2+
LDC3-
LDC3-
LDC3+
LDC3+
LL1C-
LL1C-
LL1C+
LL1C+
LDC4-
LDC4-
LDC4+
LDC4+
LDC5-
LDC5-
LDC5+
LDC5+
LDC6-
LDC6-
LDC6+
C49
LDC6+
LDC7-
LDC7-
LDC7+ NC LPLLVDD
LDC7+
LL2C+
LL2C+
LL2C- LVDD1
LL2C-
301LV/302LV:R894/R895
3
1
VBGCLK
VBGCLK [5]
VBCTL0
VBCTL0 [5]
VBHSYNC
VBHSYNC [5]
VBVSYNC
VBVSYNC [5]
U22
DVDD
64
DVDD1/DVDD
VBDE
63
VBDE/DE1
VBCTL1
62
VBCTL1/FLD/STL1
DGND
61
DVSS1/VREF1
VDDV
60
OVDD/VDDV
VBCLK
59
VBCLK/P-OUT
DGND
58
DVSS0/RESET*
57
TVCLKO/GPIO[5]
56
TSCLKI/GPIO4
55 DVDD
DVDD0/TVPLL_VDD TVPLLVDD
54
PLL1VDD/TVPLL_V
VBOSCO
53
VBOSCO/XO
VBRCLK
52
VBRCLK(XIN)/XIN
TVPLLGND
51
PLL1GND/TVPLL_G
50
RESERVED/BOC/VS
IOCS
49
IOCS/C/HSYNC
48 DAC_GND
DAC_GND/DAC_GND
47 DAC_VDD
DAC_VDD/DACA3
46
RESERVED/DACB3 C
45
IOC/DACA2
44
RESERVED/DACB2
Y
43
IOY/DACA1
42
RESERVED/DACB1
COMPOSITE
41
IOCOMP/DACA0
V2COMP
40
V2COMP/DACB0
39 DAC_GND
DAC_GND/DAC_GND
SIS302LV
R267 147
R268 6K
R23 NC R269 2K C321 1UF
R22 0
+3VS
L12
LVDD1
FCM1608K121
C37 C36
10UF/10V 0.1UF
+3VS
L13
LVDD2
FCM1608K121
C38 C39
10UF/10V 0.1UF
+3VS
R242 2.2K LDDCDATA
L20
+3VS
VDDV
R241 2.2K LDDCCLK FCM1608K121
C60 C59
10UF/10V 0.1UF
+3VS
L18
FCM1608K121
C67 C66
N5
10UF/10V 0.1UF
C42
+3VS
VBDE [5]
L14
VBCTL1 [5]
NC/0.1uF
FCM1608K121
C50 C41
VBCLK [5]
N3
10UF/10V 0.1UF
T
T
+5VS +3VS
T
L11
T
V5V
FCM1608K121
C48 C47 C32 C33
N2
10UF/10V 0.1UF 0.1UF 10UF/10V
T
T
+3VS +3VS
L15 L19
VREF2
FCM1608K121
FCM1608K121 C46 C69 C58
N4
0.1UF 0.1UF 10UF/10V
Choose clock source:main board/crystal
+3VS
R1 :NC/22
Spread range:R120:+-1.5%/+-2.5% L17
Y3
VBOSCO VBRCLK
FCM1608K121
R24 10 C65 C56
C52 14.318MHZ C43
10UF/10V 0.1UF
22P 22P
C35
0.1UF
LGND
C40
0.1UF
LGND
DVDD
C68
0.1UF
DGND
V2COMP
DAC_VDD
C51
0.1UF
DAC_GND
LPLLVDD
C34
0.1UF
LPLLGND
TVPLLVDD
C57
0.1UF
TVPLLGND
DVDD
C55
0.1UF
DGND