Clevo D400S Service Manual page 79

Socket 478 1 of 2
HD#[0..63]
HD#[0..63] [5]
VCC_CORE
JCPU1A
HD#0 B21
D0
HD#1 B22
D1
HD#2 A23
D2
HD#3 A25
D3
HD#4 C21
D4
HD#5 D22
D5
HD#6 B24
D6
HD#7 C23
D7
HD#8 C24
D8
HD#9 B25
D9
HD#10 G22
D10
HD#11 H21
D11
HD#12 C26
D12
HD#13 D23
D13
HD#14 J21
D14
HD#15 D25
D15
HD#16 H22
D16
HD#17 E24
D17
HD#18 G23
D18
HD#19 F23
D19
HD#20 F24
D20
HD#21 E25
D21
HD#22 F26
D22
HD#23 D26
D23
HD#24 L21
D24
HD#25 G26
D25
HD#26 H24
D26
HD#27 M21 INTEL P4 CPU SOCKET 478 PART 1
D27
HD#28 L22
D28
HD#29 J24
D29
HD#30 K23
D30
HD#31 H25
D31
HD#32 M23
D32
HD#33 N22
D33
HD#34 P21
D34
HD#35 M24
D35
HD#36 N23
D36
HD#37 M26
D37
HD#38 N26
D38
HD#39 N25
D39
HD#40 R21
D40
HD#41 P24
D41
HD#42 R25
D42
HD#43 R24
D43
HD#44 T26
D44
HD#45 T25
D45
HD#46 T22
D46
HD#47 T23
D47
HD#48 U26
D48
HD#49 U24
D49
HD#50 U23
D50
HD#51 V25
D51
HD#52 U21
D52
HD#53 V22
D53
HD#54 V24
D54
HD#55 W26
D55
HD#56 Y26
D56
HD#57 W25
D57
HD#58 Y23
D58
HD#59 Y24
D59
HD#60 Y21
D60
HD#61 AA25
D61
HD#62 AA22
D62
HD#63 AA24
D63
RS#0
F1
[5] RS#0
RS0
RS#1
G5
[5] RS#1
RS1
RS#2
F4
[5] RS#2
RS2
VCC_CORE
C683
VCC_CORE +2.5V
0.1UF C312 C416 C389
10U(0805) 10U(0805) 10U(0805)
VCC_CORE
C341 C417 C418 C343 C388
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
MOBIL CPU
AD25=DPSLP(H_DPSLP#)
A6=GHI#(PM_CPUPERF#)
C328 C315 C314 C325 C340 C347 C348 C345 C324 C391
10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805)
C300 C342 C327 C329 C344 C311 C310 C326 C339 C350 C109
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
AB1
A35 T
Y1 HA#[3..31]
HA#[3..31]
A34 T
W2
A33 T
V3
A32 T
U4 HA#31
A31
T5 HA#30
A30
W1 HA#29
A29
R6 HA#28
A28
V2 HA#27
A27
T4 HA#26
A26
U3 HA#25
A25
P6 HA#24
A24
U1 HA#23
A23
T2 HA#22
A22
R3 HA#21
A21
P4 HA#20
CPURST#
A20
P3 HA#19
A19
R2 HA#18 4.7K(R)
A18
T1 HA#17
A17
N5 HA#16
A16
N4 HA#15
A15
N2 HA#14
A14
M1 HA#13
A13 +3VS
N1 HA#12
A12
M4 HA#11
A11
M3 HA#10
A10
L2 HA#9
A9
M6 HA#8
A8
L3 HA#7 R281 R282 R294 R295 R304
A7
K1 HA#6
A6
L6 HA#5
A5
K4 HA#4
A4
K2 HA#3 1K 1K 1K 1K 1K
A3
VID0
AE5
VID0
AE4 VID1
VID1
AE3 VID2
VID2
AE2 VID3
VID3 VID4
AE1
VID4
HREQ#[0..4]
HREQ#[0..4][5]
HREQ#4
H3
REQ4
HREQ#3
J3
REQ3
HREQ#2
J4
REQ2
HREQ#1
K5
REQ1
J1 HREQ#0
REQ0
AB4 HBPRM5#
BPM5 HBPRM5#
HBPRM4#
AA5
BPM4 HBPRM4#
Y6
BPM3
AC4
BPM2
HBPM1#
AB5
HBPM1# [3]
BPM1
HBPM0#
AC6
HBPM0# [3]
BPM0
H_DPSLP#
H_DPSLP#[29]
PM_CPUPERF#
PM_CPUPERF# [ 15]
AD25 R245
51
DPSLP#
A6 R279
51
GHI#
Y3 R320 51
Design Guide
TESTHI10
W4 R326 51
TESTHI9
U6 R325 51 updates for
TESTHI8
AB22 R259 51
TESTHI7
AA20 R260 51 P4P/845
TESTHI6
AC23 R246
51
TESTHI5
AC24 R248
51
TESTHI4
AC20 R261
51
TESTHI3
AC21 R262 51
TESTHI2
AA2 R321 51
TESTHI1
AD24 R247 51
TESTHI0 VCC_CORE
NORTHWOOD478
VID[0..4]
VID[0..4] [15,30]
C126 C111 C98 C99 C31 C45
10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805) 10U(0805)
C386 C390 C110
0.1UF 0.1UF 0.1UF
Socket 478 1 of 2 (71-D4000-D04) B - 3
Schematic Diagrams
[5]
+3V
L<0.1inch
R535 HA#31
1K(R)
Q29(R)
G
2N7002
R536 C
B Q30(R)
E
2N3904
Sheet 2 of 35
Disable HT
function
Socket 478 1 of 2
[3]
[3]