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5820A
Service Manual
The 5 s to 50 ms markers are generated on A6 and are passed to A55 for filtering and
shaping. The 20 ms to 2 s markers are derived from a square wave signal that is
generated on A55 and passed through wave shaping and external trigger generation. The
1 s to 20 ns periods are derived from leveled sine or square wave signals.
The 10 ns to 2 ns sine markers are generated from the leveled sine wave generator on
A55. This signal is also split to drive the external trigger circuits. If the trigger is turned
on, the signal is then connected to the Trig Out on the front panel. The other path routes
the signal to the marker circuits on A55, where the signal is shaped into the other marker
waveforms. The marker signals are passed from A55 to the A90 and on to the front panel
high frequency switch.
Filters on A55 shape the signal into spike and 20% pulse. The marker signal passing
through A55 is connected to the A90 assembly. The signal is then passed to the front
panel high frequency switch. Output trigger capability is available with these signals.
2-6.
Wave Generator Mode
All amplitude and frequency for the Wavegen function are generated on A6 and the
signals are routed through A55. The signals are then sent to the A90 assembly, where
range attenuation occurs. Wavegen signals are then sent to front panel high frequency
switch. Output trigger capability is not available with these signals.
2-7.
Pulse Generator
Pulse Gen (Pulse Generator Modes) signals are derived from A52. While the maximum
pulse period is 20 ms or 50 Hz, the minimum is 200 ns. The pulse width can be set to
less than 1 ns or set as wide as 500 ns. The pulse can be skewed with the output trigger
so that it leads or lags the trigger in 250 ps increments. Output trigger capability is
available with this signal.
2-8.
Input DC Voltage Measurement Mode
The dc voltage measurement mode is provided through A6. The input signal to be
measured is filtered on A3. The DCV reference signal and measuring signals are on A6.
Maximum input voltage is 10 V dc.
Input voltages above 30 V dc may cause damage to the unit.
2-9.
Input Impedance Mode (Resistance)
The reference resistors for input resistances are on A51, while the actual measurement
takes place on A6.
2-10. Input Impedance Mode (Capacitance)
Capacitance measurement circuits are contained on A55. Signals from the leveled sine
signals are used in the measurement.
2-8
Caution
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