TYAN Tempest i5100X User Manual page 63

3.6.1 North Bridge Configuration Sub-Menu
This menu gives options for customizing North Bridge Chipset settings. Select a
menu by highlighting it using the Arrow ( / ) keys and pressing Enter. The
settings are described on the following pages.
Main
North Bridge Chipset Configuration
Hyper-Threading Function
Crystal Beach / DMA
MCH Channel Mode
Patrol Scrubbing
Demand Scrubbing
Channel Dependent Sparing
Channel 0
Channel Specific Sparing
Rank Interleaving
Channel 1
Channel Specific Sparing
Rank Interleaving
Boots Graphic Adapter Priority
Read Completion Coalescing
DRAM Clock
Feature
North Bridge Chipset Configuration
Hyper-Threading
Function
Crystal Beach / DMA
MCH Channel Mode
Patrol Scrubbing
Demand Scrubbing
BIOS Setup Utility
Advanced PCI/PnP
Option
Enabled
Disabled
Disabled
Enabled
Channel
Sequencing
Channel
Interleave
Enabled
Disabled
Enabled
Disabled
Boot Security
[Enabled]
[Disabled]
[Channel Interleave]
[Enabled]
[Enabled]
[Disabled]
[Enabled]
[Disabled]
[4:1]
[Enabled]
[Disabled]
[4:1]
[Auto]
[Auto]
[DDR533]
Enable or disable hyper-threading
functionality
Crystal Beach / DMA configuration
Sequencing: allocates address channel
0 then 1.
Interleaving: interleaves channel across
channels.
ECC patrol scrubbing enabled /
disabled
ECC demand scrubbing enabled /
disabled
63
Chipset Exit
← → Select Screen
↑↓ Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
Description