Auto Increment And Decrement; Addressing Mode Bits And Adrs Field Description; Flag Addressing Syntax And Bits - Texas Instruments MSP50C614 User Manual

Mixed-signal processor
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Table 4–45. Auto Increment and Decrement
Operation
next A
No modification
Auto increment
++A
Auto Decrement
– –A
Table 4–46. Addressing Mode Bits and adrs Field Description
Relative
Clocks
Addressing
Addressing
clk
Modes
Direct
2
Short relative
1
Relative to R5
1
Long relative
2
Indirect
Indirect
1
1
† Replace n R with n S for string operation.
Note:
dma16 and offset16 is the second word.
Table 4–47. Flag Addressing Syntax and BIts
Flag
Clocks
Words
Addressing
Addressing
Modes
clk
Global
1
Relative
1
† n R is RPT instruction argument
b9
b8
0
0
0
1
1
0
String†
String†
Repeat
Words
Operation
Operation
w
Clocks
2
n
+4
* dma16
R
1
n
+2
*R6 + offset7
R
1
n
+2
*R x + R5
R
*R x + offset16
2
n
+4
R
*R x
*R x ++
1
1
n
n
+2
+2
R
R
*R x – –
*R x ++R5
{ flagadrs }
Repeat
Repeat
Operation
Syntax
w
clk
* dma6
1
n
+2
R
1
n
+2
*R6+ offset6
R
Addressing Mode Encoding
{ adrs }
7
6
5
4
am
R x (x = 0
0
0
0
1
offset7
0
1
0
0
0
1
0
1
1
flag addressing mode encoding, flagadrs
6
5
4
3
flag address bits
dma6
offset6
Assembly Language Instructions
Legend
3
2
1
0
7)
pm
x
0
0
R x
0
0
R x
0
0
0
0
0
1
R x
1
0
1
1
2
1
0
g/r
0
1
4-73

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