Table of Contents
Advertisement
MB91401
(Continued)
Interrupt source
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
Used by INT instruction
(2) NMI (Non Maskable Interrupt)
NMIs have the highest priority among the interrupt sources handled by this module.
An NMI is always selected whenever other types of interrupt sources occur at the same time.
• If an NMI occurs, the interrupt controller passes the information to the CPU :
Interrupt level : 15 (01111
Interrupt number : 15 (0001111
• NMI detection
NMIs are set and detected by the external interrupt/NMI controller. This module only generates an interrupt
level, interrupt number, and MHALTI upon NMI request.
• Suppressing DMA transfer upon NMI request
When an NMI request occurs, the MHALTI bit in the HRCL register is set to "1", suppressing DMA transfer. To
permit DMA transfer, clear the MHALTI bit to "0" at the end of the NMI routine.
46
Interrupt number
Hexa-
Decimal
decimal
68
44
69
45
70
46
71
47
72
48
73
49
74
4A
75
4B
76
4C
77
4D
78
4E
79
4F
80
50
to
to
255
FF
)
B
)
B
Interrupt
Offset
level
2EC
H
2E8
H
2E4
H
2E0
H
2DC
H
2D8
H
2D4
H
2D0
H
2CC
H
2C8
H
2C4
H
2C0
H
2BC
H
to
000
H
Prelminary
2004.11.12
Address of TBR
RN
default
000FFEEC
H
000FFEE8
H
000FFEE4
H
000FFEE0
H
000FFEDC
H
000FFED8
H
000FFED4
H
000FFED0
H
000FFECC
H
000FFEC8
H
000FFEC4
H
000FFEC0
H
000FFEBC
H
to
000FFC00
H
Advertisement
Table of Contents
