Fujitsu MB91401 Datasheet page 34

MB91401
I/O MAP
This shows the location of the various peripheral resource registers in the memory space.
[How to read the table]
Address
0000_0000
H
|
0000_003C
H
EIRR [R/W]
0000_0040
H
00000000
Note : Initial values of register bits are represented as follows :
"1" : Initial Value
"0" : Initial Value
"X" : Initial Value
"-" : Access prohibited in reserved area.
Address
0000_0000
H
to
0000_003C
H
EIRR [R/W]
0000_0040
H
00000000
DICR [R/W]
0000_0044
H
-------0
0000_0048
H
XXXXXXXX
0000_004C
H
0000_0050
H
XXXXXXXX
0000_0054
H
0000_0058
H
XXXXXXXX
0000_005C
H
34
Register
0 1
ENIR [R/W]
00000000
Read/Write attribute
Initial value after a reset
Register name (First-column register at address 4n; second-column register
at address 4n + 2)
Left most register address (When accessing it by word, the register of
column 1 is positioned on the MSB side of data.)
"1"
"0"
"X"
Register
0 1
ENIR [R/W]
00000000
HRCL [R/W]
0-11111
TMRLR0 [W]
XXXXXXXX
TMRLR1 [W]
XXXXXXXX
TMRLR2 [W]
XXXXXXXX
2 3
ELVR [R/W]
00000000 00000000
2 3
ELVR [R/W]
00000000 00000000
TMR0 [R]
XXXXXXXX XXXXXXXX
TMCSR0 [R/W]
----0000 00000000
TMR1 [R]
XXXXXXXX XXXXXXXX
TMCSR1 [R/W]
----0000 00000000
TMR2 [R]
XXXXXXXX XXXXXXXX
TMCSR2 [R/W]
----0000 00000000
Prelminary
2004.11.12
Block
Reserved
Ext Int
Block
Reserved
Ext Int
DLYI/I-unit
Reload Timer 0
Reload Timer 1
Reload Timer 2
(Continued)