Fujitsu MB91401 Datasheet page 12

MB91401
EXTERNAL IF (23 pin)
Pin name Pin no.
EXCSX 50
EXA 116
EXD15 180
EXD14 122
EXD13 57
EXD12 56
EXD11 121
EXD10 54
EXD9 179
EXD8 120
EXD7/GPIO7 53
EXD6/GPIO6 178
EXD5/GPIO5 119
EXD4/GPIO4 52
EXD3/GPIO3 228
EXD2/GPIO2 177
EXD1/GPIO1 118
EXD0/GPIO0 51
EXRDX 117
EXWRX 176
EXIS16 49
DREQRX 174
DREQTX 175
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I/O
Polarity Circuit
Nega- External chip select input pin
IN D
tive Chip select input pin from external host.
External address input pin
Address input pin from external host.
IN D
"0" : Register select
"1" : FIFO data select
External data input/output pins
I/O B The I/O terminal of data bus bit of bit15 to bit8 with an
external host.
External data/GPIO input/output pins
The I/O terminal of data bus bit of bit7 to bit0 with an
I/O B external host.
Note : When EXIS16 "0" input, it becomes the I/O terminal
of GPIO7 to GPIO0.
Nega- External read strobing input pin
IN D
tive Read strove input pin from external host
Nega- External write strobing input pin
IN D
tive Write strove input pin from external host
External data bus width select input pin
Bit width select pin of EXD
IN D "0" : 8 bit
(Note : EXD15 to EXD8 are enabled.)
"1" : 16 bit
Nega- External reception data request output pin
OUT F
tive Recordable data to reception FIFO is shown.
External transfer data request output pin
Nega-
OUT F It is shown that there are data in transmission register and
tive
transmission FIFO.
Prelminary
2004.11.12
Function/application